Showing papers on "Capacitance published in 1989"

Short-channel effect in fully depleted SOI MOSFETs

Abstract: The short-channel effect in fully depleted silicon-on-insulator MOSFETs has been studied by a two-dimensional analytical model and by computer simulation. The calculated values agree well with the simulation results. It is found that the vertical field through the depleted film strongly influences the lateral field across the source and drain regions. The short-channel effect can be significantly reduced by decreasing the silicon film thickness. >

Electrical Characterization of GaAs Materials and Devices

Abstract: Part 1 The hall effect and magnetoresistance: practical considerations conductivity and hall coefficient scattering theory - mobility semiconductor statistics - carrier concentration. Part 2 Magnetoresistance in ungated structures - contact resistance patterns and gunn diodes: one-layer TLM and magneto-TLM analysis two-layer TLM and magneto-TLM analysis gunn diodes, and geometry corrections. Part 3 Capacitance and magnetoresistance in gated structures - field-effect transistors: gated capacitance - concentration profiling in MESFETs gated capacitance and conductance - mobility profiling in MESFETs gated magnetoresistance - mobility profiling in MESFETs gate current and parasitic-resistance effects capacitance and magnetoresistance in MODETs. Part 4 Capacitance and conductance effects from deep traps: steady-state effects transient behaviour - emission and capture temperature spectrosocpy - DLTS optical excitation in ungated structures - PICTS and HETS. Appendices: solutions to differential equations multi-band conduction semiconductor statistics commercial hall effect instruments.

Circuit for measuring the capacity of a battery

Abstract: The discharge capacity of a secondary battery, e.g. a Ni-Cd battery, has a maximum value at room temperature and gradually decreases both with an increase and decrease of ambient temperature. The battery discharge capacity also varies inversely with the number of battery charge/discharge cycles of the battery. A circuit for measuring the remaining discharge capacity of the secondary battery comprises a capacitor (23) whose temperature and age-variation characteristics are very similar to those of the discharge capacity of the secondary battery. The current flowing through the battery and motor (13) is detected by a series resistor (17). A voltage follower (20) responds to the detected voltage and drives a resistor (24), so that capacitor (23) is discharged at a rate determined by the resistor (24) current. The capacitor voltage is compared with a predetermined value by a hysteresis comparator (29) which controls the ON/OFF state of a transistor (21) in accordance with the comparison. The comparator output pulses, i.e., the capacitor charge/discharge cycles, are counted by a counter (31). Since the capacitance variation of the capacitor corresponds to the variation in battery discharge capacity with ambient temperature and also with the time of use, the counter (31) indicates very accurately the remaining battery capacity

Multiple chemically modulated capacitance determination

Abstract: Apparatus and methods are provided for multiple detection of analytes employing semiconductor capacitance as the signal modulated by the analyte. A plurality of semiconductor capacitors are organized for detection (at individual sites) of changes in capacitance which are related to changes in a fluid medium, where the change can be related to the presence of an analyte. Circuitry is designed to substantially maximize sensitivity.

A self-calibration technique for monolithic high-resolution D/A converters

Abstract: A self-calibration technique based upon charge storage on the gate-source capacitance of CMOS transistors is presented. The technique can produce multiple copies of a reference current. Therefore, it is suitable for the calibration of high-resolution D/A (digital/analog) converters which are based upon equal current sources. As the storage capacitor is internal, no external components are required. A calibrated spare current source is used to allow continuous converter operation. This implies that no special calibration cycles are required. To show the capabilities of the calibration technique, it was implemented in a 16-b D/A converter. Measurement results show a total harmonic distortion of 0.0025% at a power consumption of 20 mW and a minimum supply voltage of 3 V. The design was fabricated in a 1.6- mu m double-metal CMOS process without special options. >

Tomographic imaging of two-component flow using capacitance sensors

Abstract: Describes a tomographic flow imaging system based on capacitance sensors. It uses eight capacitance electrodes to perform a 'body scan' of the fluid-conveying pipe, and a linear back projection algorithm is developed to reconstruct the cross-sectional image of the two-component flow from the measured capacitance values. A prototype system has been successfully assembled and reconstructed images of static distribution models are presented. Possible industrial applications and practical limitations of the system are discussed.

Pressure mapping system with capacitive measuring pad

Abstract: A pressure distribution measuring system includes a pad of insulating material disposed between two linear arrays of electrodes to form a matrix of capacitive nodes. A capacitance related output signal that is obtained from a node of interest is used as a feedback signal and applied to other capacitors that are connected in common with the node of interest. The feedback signal inhibits the flow of current through these commonly connected capacitors, and thereby isolates the measured signal from any changes in the capacitance of these other capacitors. The pad includes a cental array of linear electrodes sandwiched between two layers of dielectric foam material. Two outer, aligned linear electrode arrays, oriented perpendicular to the central array, are respectively disposed on the outside surfaces of the dielectric layers. In a preferred form, alternating electrodes in each outer array are located on opposite sides of a support substrate. This construction increases the amplitude of the measured signal, isolates the measured signal from the ambient environment, and reduces the susceptibility of the measuring process to errors caused by wrinkling of the pad as a person lies on it, or the like.

Dynamics of a collisional, capacitive RF sheath

Abstract: A self-consistent solution for the dynamics of a high-voltage, capacitive RF sheath driven by a sinusoidal current source is obtained, under the assumptions of time-independent, collisional ion motion and inertialess electrons. Values of the ion current density, the sheath capacitance per unit area for the fundamental voltage harmonic, and the conductance per unit area for stochastic heating by the oscillating sheath are calculated. The ratio of the DC to the peak value of the oscillating voltage is found to be 0.40, while the second and third voltage harmonics are, respectively, 19.3% and 5.3% of the fundamental. >

Capacitor laminate for use in capacitive printed circuit boards and methods of manufacture

Abstract: A capacitor laminate is described either as an intermediate product for use in a capacitive printed circuit board or as part of the assembled printed circuit board in order to provide a bypass capacitive function for large numbers of devices mounted or formed on the printed circuit board, the capacitor laminate being formed from sheets of conductive material and an intermediate sheet of dielectric material forming the laminated capacitor as a structurally rigid assembly and facilitating its inclusion within the PCB, components of the capacitor laminate having selected characteristics whereby each individual device is provided with capacitance by a proportional portion of the capacitor laminate and by borrowed capacitance from other portions of the capacitor laminate, the capacitive function of the capacitor laminate being dependent upon random firing or operation of the devices. Methods of manufacture for the capacitor laminate as well as the capacitive PCB are also described. The capacitor laminate of the present invention is preferably formed with preferred surface treatment or surface characteristics on the conductive foils employed therein.

Scanning capacitance microscopy on a 25 nm scale

Abstract: A near‐field capacitance microscope has been demonstrated on a 25 nm scale. A resonant circuit provides the means for sensing the capacitance variations between a sub‐100‐nm tip and surface with a sensitivity of 1×10−19 F in a 1 kHz bandwidth. Feedback control is used to scan the tip at constant gap across a sample, providing a means of noncontact surface profiling. Images of conducting and nonconducting structures are presented.

Quantum-Barrier-Varactor Diodes for High-Efficiency Millimetre-Wave Multipliers

Abstract: A new device, the quantum-barrier-varactor diode (QBV diode), is proposed for use in multipliers for millimetre waves. Since the capacitance/voltage characteristic is symmetric, only odd harmonics are obtained. Hence there is no idler circuit to consider for the tripler and only one for the quintupler. It is shown that for triplers and quintuplers, the theoretical efficiency using QBVs is comparable or possibly larger than using Schottky varactor diodes.

Lateral dopant profiling with 200 nm resolution by scanning capacitance microscopy

Abstract: Measurement of dopant density in silicon with lateral resolution on the 200 nm scale has been demonstrated with a near‐field capacitance technique. The technique is based upon the measurement of local capacitance between a 100 nm tip and a semiconducting surface. Lateral dopant imaging is achieved by the measurement of the voltage‐dependent capacitance between tip and sample due to the depletion of carriers in the semiconductor, as the tip is scanned laterally over the surface. Measurements of dopant density have been demonstrated over a dopant range of 1015–1020 cm−3. Capacitance‐voltage measurements have been made on a submicrometer scale.

Dc/dc converter switching at zero voltage

Abstract: A two switch, DC/DC converter provides sufficient inductive energy storage at the termination of the "on" period of each switch to alter the charge on the intrinsic and stray capacitance of the combination of switches producing zero voltage across the alternate switch prior to its turn on. A short dead-band between the turn on pulses provided by the control circuit allows time for this transition. Thus the energy stored in the capacitance of the switches is returned to the source and load rather than being dissipated in the switching devices. This greatly improves the efficiency of the converter particularly when operating at high frequency. The unique topology of the converter provides other new and useful characteristics in addition to zero voltage switching capability such as operation as constant frequency with pulse-width-modulation for regulation, quasi-square wave output current, and the ability to integrate the magnetic elements with or without coupling.

Overlapping electron traps in n‐type silicon studied by capacitance transient spectroscopy

Abstract: In n‐type Czochralski‐grown silicon samples, a broad unidentified level is observed ∼0.32 eV below the conduction band after high‐energy electron irradiation. This level has been investigated in detail using deep‐level transient spectroscopy and capacitance‐versus‐time measurements. The broad level consists of two overlapping but independent peaks which are clearly resolved. The generation rate of these peaks, as a function of bombardment dose and as a function of sample depth, as well as their annealing kinetics has been investigated. The identities of the overlapping peaks are discussed, and our findings are compared with optical and electron paramagnetic resonance (EPR) measurements performed by other authors. In particular, the importance of performing depth profiling when identifying unknown peaks is emphasized. One level is tentatively assigned to a gold‐related complex, while the other shows several similarities with the EPR G15 center.

Low capacitance large volume shaped-field germanium detector

Abstract: A large-volume (150 cm/sup 3/) germanium detector with a full-depletion capacitance of only approximately=1 pf has been fabricated. The effect of impurity space charge was utilized to obtain an appropriate electric field distribution in the detector so that carriers are collected on a small-area electrode. Detectors based on this principle are capable of very-low-noise operation and have immediate applications in experiments for the direct detection of dark matter. Detector pulse shapes and carrier-trapping effects were also examined for possible applications involving higher energy radiations. >

Operating principles of the ultracapacitor

Abstract: The charge-storage mechanism and the design of the ultracapacitor are described. Based on a ceramic with an extremely high specific surface area and a metallic substrate, the ultracapacitor provides extremely high energy densities and exhibits low ESR (equivalent series resistance). The combination of low ESR and extremely low inductance provides the ultracapacitor with a very high power density and fast risetime as well. As a double-layer capacitor, the ultracapacitor is not constrained by the same limitations as dielectric capacitors. Thus, although its discharge characteristics and equivalent circuit are similar to those of dielectric capacitors, the capacitance of the ultracapacitor increases with the ceramic loading on the substrate and its ESR is inversely proportional to the cross-sectional area of the device. The ultracapacitor is composed of an inline stack of electrodes, which leads to an extremely low inductance device, and it exhibits interesting frequency dependence. The ultracapacitor principle has been extended to nonaqueous electrolytes and to a wide temperature range. >

Technique for measuring the frequency‐dependent complex dielectric constants of liquids up to 20 GHz

Abstract: A technique for the measurement of the frequency‐dependent complex dielectric constant e=e’−je‘ of liquids applicable to frequencies up to at least 20 GHz is described. The technique utilizes a coaxial probe dipped into the liquid. The reflection coefficient of the probe was measured using a network analyzer between 45 MHz and 20 GHz. A new de‐imbedding procedure for eliminating the connector and coax mismatches is described, during which the impedance Z(e) of the probe end was determined. The dielectric constant e was determined from Z(e) by modeling the coax–liquid interface as a capacitance. The de‐imbedding procedure, which utilizes three calibrations, directly eliminates the (unknown) fringe‐field impedance. Radiation effects were minimized by using narrow (0.047‐in.) semirigid coax. The technique yields accurate results for e’ and e‘ of liquids such as methanol and water over the entire frequency range up to 20 GHz, and can be used to determine the relaxation spectra of liquid and liquidlike samples.

Method of making multilayer printed circuit board

Abstract: A method of making a multilayer printed circuit board providing sufficient internal distributed capacitance so as to eliminate the need for the by-pass capacitor conventionally provided in the vicinity of each integrated circuit mounted to the board. The method includes providing one or more fully-cured power-ground plane sandwich components which are laminated together with other partially cured component layers of the board. Each sandwich component comprises a conductive power plane layer and a conductive ground plane layer having a fully cured dielectric material therebetween. The thickness of the dielectric layer of each sandwich is chosen sufficiently thin to provide the desired distributed capacitance.

Implanted silicon JFET on completely depleted high-resistivity devices

Abstract: To satisfy the increasing interest in the integration of electronics onto optical and ionizing particle fully depleted detectors, a nonconventional JFET (junction field-effect transistor), designed to operate on a completely depleted, 2-k Omega -cm resistivity silicon substrate, has been designed, fabricated, and tested at room temperature. The devices show very low gate leakage current, low output conductance, a transconductance per unit gate width of 3 mS/mm, and a pinch-off voltage of -1.5 V. The integration of the devices onto the detectors makes possible the matching of the input capacitance of the JFET to the detector's output capacitance, which is of the order of few hundreds of femtorads. The measured gate capacitance of 200 fF is shown to correspond to an expected resolution in charge measurements, at room temperature, of less than 40 electrons rms. The fabrication constraints, imposed by the limited number of production steps of the detectors, are reported. >

Coulomb oscillations of the conductance in a laterally confined heterostructure

Abstract: The authors predict a new type of conductance oscillations in a GaAs heterostructure with a proposed strip-like gate with a hole. Such a gate defines a conducting dot (under the hole) in an otherwise depleted region of a two-dimensional electron gas. The oscillations are caused by discrete changes of the charge of the dot as the gate voltage is varied. They show that for low temperatures, T

Molecular dynamics simulation of water beween two ideal classical metal walls

Abstract: We have simulated a slab of water with two‐dimensional periodic boundary conditions between two metallic walls. The entire compliment of charges, arising from periodic reproductions and from classical images in the metal, are included explicitly by mapping onto a problem with three‐dimensional periodicity which is handled by usual Ewald summation methods. Results are presented for charged and uncharged surfaces, permitting an estimate of the differential capacitance arising from the layer of water near the walls. The estimate is about a factor of 2 smaller than the observed differential capacitance of metal–aqueous electrolyte interfaces.

Nonlinear charge movement in mammalian cardiac ventricular cells. Components from Na and Ca channel gating.

Abstract: Intramembrane charge movement was recorded in rat and rabbit ventricular cells using the whole-cell voltage clamp technique. Na and K currents were eliminated by using tetraethylammonium as the main cation internally and externally, and Ca channel current was blocked by Cd and La. With steps in the range of -110 to -150 used to define linear capacitance, extra charge moves during steps positive to approximately -70 mV. With holding potentials near -100 mV, the extra charge moving outward on depolarization (ON charge) is roughly equal to the extra charge moving inward on repolarization (OFF charge) after 50-100 ms. Both ON and OFF charge saturate above approximately +20 mV; saturating charge movement is approximately 1,100 fC (approximately 11 nC/muF of linear capacitance). When the holding potential is depolarized to -50 mV, ON charge is reduced by approximately 40%, with little change in OFF charge. The reduction of ON charge by holding potential in this range matches inactivation of Na current measured in the same cells, suggesting that this component might arise from Na channel gating. The ON charge remaining at a holding potential of -50 mV has properties expected of Ca channel gating current: it is greatly reduced by application of 10 muM D600 when accompanied by long depolarizations and it is reduced at more positive holding potentials with a voltage dependence similar to that of Ca channel inactivation. However, the D600-sensitive charge movement is much larger than the Ca channel gating current that would be expected if the movement of channel gating charge were always accompanied by complete opening of the channel.

Electrorheological fluid-based robotic fingers with tactile sensing

Abstract: Prototype fingertips using electrorheological (ER) fluids with elementary tactile sensing were fabricated and tested. The fingertips consist of a layer of ER fluid sandwiched between a grounded elastomer skin and a positively charged electrode. This arrangement forms a capacitor whose value increases as the elastomer is deflected toward the positive electrode. The ER fingertips can be put on a robot gripper or the fingers of a dextrous robot hand. The fluid layer acts as a soft conformal pad when the voltage is turned off. When energized, the fluid changes from a Newtonian fluid to a Bingham plastic with a yield stress of a few kPa. The result is a finger with simple tactile sensing and the ability to generate large lifting forces with small grasp forces, due to interlocking between the deformed skin/solidified fluid and the gripped object. A gripper with ER fingertips was able to grip a raw egg gently using capacitance sensing. The authors examine the improved lifting force available with ER fingertips over passive designs. The design of a multielement fingertip for shape sensing is investigated and recommendations are offered for designing practical ER robotic hands. >

Memory cell and technology issues for 64- and 256-Mbit one-transistor cell MOSD DRAMs

Abstract: The memory cell and technology requirements and issues for 64- and 256-Mb MOS DRAMs (dynamic random-access memories) based on the charge storage concept (one-transistor cell) are analyzed. Projected requirements have been developed for key parameters such as die size, cell area, charge capacity, storage capacitance and area, leakage current, and on-current. These requirements are based on an analysis and assessment of expected improvements in soft error rate, sense amplifier sensitivity, 0-1 storage voltage difference, and bit line capacitance. Pivotal issues specific to the DRAM are identified. It is concluded that sufficient progress will be made so that 64-Mb DRAMs will be successfully produced in the early to mid-1990s. >

8-electrode capacitance system for two-component flow identification. I. Tomographic flow imaging

Abstract: An 8-electrode capacitance system for tomographic imaging of two-component flows has been designed based upon a 2-dimensional finite element model. Emphasis is made on the development of a linear back-projection image reconstruction algorithm. Some reconstructed images obtained using this algorithm are given. Limitations and possible future improvements of the system are discussed.

Anomalous C-V characteristics of implanted poly MOS structure in n/sup +//p/sup +/ dual-gate CMOS technology

Abstract: The C-V characteristics of arsenic-doped polysilicon show a gate-bias dependence of the inversion capacitance and a reduction in the expected value of the inversion capacitance. The characteristics have been investigated with quasistatic and high-frequency C-V as well as conductance measurements of various capacitors that have been subjected to annealing times and temperatures ranging from 900 degrees C/30 min to rapid thermal annealing at 1050 degrees C. The results can be explained by assuming that there is a depletion region forming in the polysilicon due to insufficient activation of the dopant at the polysilicon/oxide surface. The impact of this condition on the device characteristics is shown to be a 20-30% reduction in the G/sub m/ of NMOS transistors with 125-AA Gate oxide thickness.