Showing papers on "Nanoelectronics published in 2001"

Indium phosphide nanowires as building blocks for nanoscale electronic and optoelectronic devices

Abstract: Nanowires and nanotubes carry charge and excitons efficiently, and are therefore potentially ideal building blocks for nanoscale electronics and optoelectronics. Carbon nanotubes have already been exploited in devices such as field-effect and single-electron transistors, but the practical utility of nanotube components for building electronic circuits is limited, as it is not yet possible to selectively grow semiconducting or metallic nanotubes. Here we report the assembly of functional nanoscale devices from indium phosphide nanowires, the electrical properties of which are controlled by selective doping. Gate-voltage-dependent transport measurements demonstrate that the nanowires can be predictably synthesized as either n- or p-type. These doped nanowires function as nanoscale field-effect transistors, and can be assembled into crossed-wire p-n junctions that exhibit rectifying behaviour. Significantly, the p-n junctions emit light strongly and are perhaps the smallest light-emitting diodes that have yet been made. Finally, we show that electric-field-directed assembly can be used to create highly integrated device arrays from nanowire building blocks.

Logic circuits with carbon nanotube transistors

Abstract: We demonstrate logic circuits with field-effect transistors based on single carbon nanotubes. Our device layout features local gates that provide excellent capacitive coupling between the gate and nanotube, enabling strong electrostatic doping of the nanotube from p-doping to n-doping and the study of the nonconventional long-range screening of charge along the one-dimensional nanotubes. The transistors show favorable device characteristics such as high gain (>10), a large on-off ratio (>10(5)), and room-temperature operation. Importantly, the local-gate layout allows for integration of multiple devices on a single chip. Indeed, we demonstrate one-, two-, and three-transistor circuits that exhibit a range of digital logic operations, such as an inverter, a logic NOR, a static random-access memory cell, and an ac ring oscillator.

Logic gates and computation from assembled nanowire building blocks.

Abstract: Miniaturization in electronics through improvements in established “top-down” fabrication techniques is approaching the point where fundamental issues are expected to limit the dramatic increases in computing seen over the past several decades Here we report a “bottom-up” approach in which functional device elements and element arrays have been assembled from solution through the use of electronically well-defined semiconductor nanowire building blocks We show that crossed nanowire p-n junctions and junction arrays can be assembled in over 95% yield with controllable electrical characteristics, and in addition, that these junctions can be used to create integrated nanoscale field-effect transistor arrays with nanowires as both the conducting channel and gate electrode Nanowire junction arrays have been configured as key OR, AND, and NOR logic-gate structures with substantial gain and have been used to implement basic computation

Carbon Nanotube Single-Electron Transistors at Room Temperature

Abstract: Room-temperature single-electron transistors are realized within individual metallic single-wall carbon nanotube molecules. The devices feature a short (down to ∼20 nanometers) nanotube section that is created by inducing local barriers into the tube with an atomic force microscope. Coulomb charging is observed at room temperature, with an addition energy of 120 millielectron volts, which substantially exceeds the thermal energy. At low temperatures, we resolve the quantum energy levels corresponding to the small island. We observe unconventional power-law dependencies in the measured transport properties for which we suggest a resonant tunneling Luttinger-liquid mechanism.

Limits on Silicon Nanoelectronics for Terascale Integration

Abstract: Throughout the past four decades, silicon semiconductor technology has advanced at exponential rates in both performance and productivity. Concerns have been raised, however, that the limits of silicon technology may soon be reached. Analysis of fundamental, material, device, circuit, and system limits reveals that silicon technology has an enormous remaining potential to achieve terascale integration (TSI) of more than 1 trillion transistors per chip. Such massive-scale integration is feasible assuming the development and economical mass production of double-gate metal-oxide-semiconductor field effect transistors with gate oxide thickness of about 1 nanometer, silicon channel thickness of about 3 nanometers, and channel length of about 10 nanometers. The development of interconnecting wires for these transistors presents a major challenge to the achievement of nanoelectronics for TSI.

Nanoclusters: Building blocks for future nanoelectronic devices?

Abstract: Ligand stabilized metal nanoclusters in the size range of 1-2 nanometers exhibit well pronounced quantum size behaviour, even at room temperature. This is due to the development of discrete energy levels in those metal particles which are reduced in size to quasi zero-dimensionality. Quantum mechanically they can be considered as big atoms. Studies of the current-voltage (I-U) characteristics identified these clusters as single electron transistors and herewith as highly promising candidates as building blocks in future nanoelectronics. As a condition, the clusters - here it is especially Au 55 (PPh 3 ) 12 Cl 6 - have to be organized in two and one dimensions. Procedures have been developed to generate well ordered cluster monolayers by self assembling. Quasi one-dimensional cluster wires became available by degradation of monolayers by means of modified Langmuir-Blodgett techniques. Very first electrical investigations of short cluster wires indicate them as quantum mechanically determined units.

Multiwalled Carbon Nanotubes as Building Blocks in Nanoelectronics

Abstract: Molecular level components, like carbon multiwalled nanotubes (MWNT), show great potential for future nanoelectronics. At low frequencies, only the outermost carbon layer determines the transport properties of the MWNT. Due to the multiwalled structure and large capacitive interlayer coupling, also the inner layers contribute to the conduction at high frequencies. Consequently, the conduction properties of MWNTs are not very far from those of regular conductors with well-defined electrical characteristics. In our work we have experimentally utilized this fact in constructing various nanoelectronic components out of MWNTs, such as single electron transistors (SET), lumped resistors, and transmission lines. We present results on several nanotube samples, grown both using chemical vapor deposition as well as arc-discharge vaporization. Our results show that SET-electrometers with a noise level as low as 6·10 −6 e/ $$\sqrt {Hz} $$ (at 45 Hz) can be built using arc-discharge-grown carbon nanotubes. Moreover, short nanotubes with small contact areas are found to work at 4.2 K with good gate modulation. Reactive ion etching on CVD tubes is employed to produce nearly Ohmic components with a resistance of 200 kΩ over a 2 μm section. At high frequencies, MWNTs work over micron distances as special LC-transmission lines with high impedance, on the order of 5 kΩ.

Nanoscale Coulomb blockade memory and logic devices

Abstract: This paper gives a brief review of our recent work done in the area of nanometre-scale Coulomb blockade (CB) memory and logic devices, that enable us to realize future electron-number scalability by overcoming inherent problems to conventional semiconductor devices. We introduce multiple-tunnel junctions (MTJs), naturally formed in heavily doped semiconductor nanowires, as a key building block for our CB devices. For memory applications, the hybrid MTJ/MOS cell architecture is described, and its high-speed RAM operation is investigated. For logic applications the binary decision diagram logic is discussed as a suitable architecture for low-gain MTJ transistors.

SPICE model for the single electron tunnel junction

Abstract: In this paper a SPICE model for a single electron tunnel junction is given. The model is derived from a new formulation of the tunnel condition based on voltages over the tunnel junctions. To validate the model an electron box is simulated.

Challenges in nanoelectronics

Abstract: Electronic devices have decreased in size to the extent that they are now in the nanometric range, and this requires quantum mechanics which understands their operation and optimization. Many features associated with quantum effects are not desirable from an engineering point of view: the charging of a nanocapacitor runs into a Coulomb blockade; the dielectric constants of nanoparticles is much reduced; the binding energy of the shallow dopants for nanoscale quantum dots is a multiple of kBT resulting in intrinsic behaviour regardless of the doping density; etc. There are other serious problems preventing the implementation of redundancy and robustness which are so essential to electronic devices, for example, inadvertent defects cannot be avoided, contacts and input/output have to be sufficiently small resulting in pushing beyond current lithographic technology. This paper discusses some of the fundamental points which still require more understanding, and what lies ahead in nanoelectronics involving augmented cavity interactions.

Relative performance of three nanoscale devices - CMOS, RTDs and QCAs - against a standard computing task

Abstract: We present results to show the effects of device scaling on the relative performance of three device technologies, namely resonant tunnelling diodes (RTD), electronic quantum cellular automata (QCA) and complementary metal-oxide-semiconductor (CMOS) transistor technology. The minimum feature size (MOSFET or HFET gate lengths λ) is scaled from 250 to 50 nm, while QCA inter-dot separations of 20 to 2 nm are examined. The comparison is made using a standard digital circuit architecture, namely a memory-adder model. Our aim is to compare these device technologies on the system level rather than individual device level. The results show that the RTDs offer speed advantages over CMOS, but improvements in the circuit density are limited. The electronic QCAs will suffer both from effectively low packing density and low operating speeds in comparison to CMOS if conventional designs and a 2D architecture are used.

Trends in Nanotechnology: Self-Assembly and Defect Tolerance

Abstract: In this paper we discuss the concept of using self-assembly coupled with novel switching elements and a defect-tolerant architecture to fabricate advanced nanoelectronics. Self-assembly should allow small features to be fabricated at a markedly lower cost than that projected by extrapolating current trends because of the defect tolerance and the use of coarser lithography to position device features, rather than fine lithography to form the critical device dimensions.

Fabrication and integration possibilities of ultrasmall quantum dots in silicon-on-insulator material

Abstract: Single-electron transistors utilizing Coulomb blockade effects are promising candidates for future silicon based nanoelectronics. We present the fabrication of such transistors and measurements that reveal Coulomb blockade behavior. Various silicon quantum dots are investigated up to room temperature. We employ a dual gate configuration with which we are able to control our devices by both a metallic top gate as well as by an in-plane gate. This design principle enhances the integration density.

Carbon nanotubes by CVD and applications

Abstract: Carbon nanotube (CNT) exhibits extraordinary mechanical and unique electronic properties and offers significant potential for structural, sensor, and nanoelectronics applications. An overview of CNT, growth methods, properties and applications is provided. Single-wall, and multi-wall CNTs have been grown by chemical vapor deposition. Catalyst development and optimization has been accomplished using combinatorial optimization methods. CNT has also been grown from the tips of silicon cantilevers for use in atomic force microscopy.

The Effective Potential and Its Use in Simulation

Abstract: Quantum effects are known to occur in the channel of MOSFETs, where the confinement is in the direction normal to the oxide interface. For quite some time, there has been a desire to categorize this quantization and determine the role it plays in semiconductor devices. The questions that must be addressed in simulation are difficult. Pushing to dimensional sizes, such as sub-50nm gate lengths, will probe the transition from classical to quantum transport, and there is no present approach to this regime that has proved effective. Contrary to the classical case in which electrons are negligibly small, the finite extent of the momentum space available to the electron sets size limitations on the minimum wave packet - this is of the order of a few nanometers - and leads to the effective potential. The use of the effective potential for analyzing the effect of quantization on semiconductor devices is discussed.

Nanotube nanoelectronics

Abstract: Single walled carbon nanotubes (SWNTs) are emerging as the prototypical one-dimensional conductor. Since their discovery in the 90's, they have been the subject of amazingly intense study. Here we review our groups' work in this field - the creation of tiny nanoelectronic devices with nanotubes as the active element. Some nanotubes are semiconductors, and can be used to construct devices that are the 1D analogs of the MOSFET. Other nanotubes behave as nearly perfect metallic conductors, and are proving to be a new laboratory for studying the physics of electrons in 1D. Both kinds of devices may have significant technological applications.

Si/SiGe heterostructures for Si-based nanoelectronics

Abstract: Publisher Summary This chapter reviews the materials properties, processing challenges, recent technological advancements, device physics, device-design considerations and compact-modeling issues, and circuit and product applications of silicon/silicon-germanium (Si/SiGe) heterojunction devices. The impact of Si/SiGe on future system-on-a-chip (SoC) products is also discussed. The chapter explains why Si/SiGe technology is important not only to the advancement of the entire integrated circuit (IC) industry but also to the daily lives of people. The driving force for developing Si/SiGe technology and new wireless-communication techniques is the need to accommodate the ever-increasing bandwidth required by high-speed data, voice, and image transmissions. Si/SiGe technology is for real and is here to stay for at least 5–10 more years, especially in conjunction with advanced complementary metal-oxide-semiconductor (CMOS) devices to provide a very powerful bipolar CMOS (BiCMOS) technology that can enable IC designers to design circuits with unprecedented high packaging densities and high performance. Si/SiGe research on circuits, devices, and processing continues in areas such as designing of Si/SiGe monolithic millimeter-wave integrated circuit (MMWIC), deep-submicrometer BiCMOS processes, Si/SiGe optoelectronics, SiGe channel metal-oxide-semiconductor field-effect transistors (MOSFETs), and dynamic thermal voltage devices. In the future, it may be possible to have a Si/SiGe optoelectronics chip that combines SiGe heterojunction bipolar transistors (HBTs), SiGe CMOS silicon on insulator (SOI), conventional CMOS, and III–V-based photodiodes on a single chip. This concept provides a research area for materials scientists, process development engineers, device physicists, circuit designers, and systems engineers.

Confined systems and nanostructured materials

Abstract: Publisher Summary The general importance of the confined systems and nanostructure materials has been widely suggested as a key in the future of nanotechnology and of interest in diverse fields including pharmaceuticals, aerospace, nanoelectronics, and optoelectronics. Several forms of classifying confined systems exist, and the most universal classification is by considering the number of directions where the particle could move freely—for example, quasi-2D systems have two directions for the free movement of the carriers and one spatial direction of confinement. Four types of quasi-2D systems are investigated in the chapter: (1) single heterostructure, (2) double heterostructure or quantum well, (3) multiple heterostructures or multiple quantum wells, and (4) superlattices. There are many methods for the synthesis and production of nanostructured materials in a laboratory scale; however, the most important are those where high-quality quantum nanostructures are achieved. The effect of an external electric field on the electronic structure of a spherical quantum dot is studied in the chapter by applying the effective-mass envelope function theory.

Carbon Nanotubes by CVD and Applications

Abstract: Carbon nanotube (CNT) exhibits extraordinary mechanical and unique electronic properties and offers significant potential for structural, sensor, and nanoelectronics applications. An overview of CNT, growth methods, properties and applications is provided. Single-wall, and multi-wall CNTs have been grown by chemical vapor deposition. Catalyst development and optimization has been accomplished using combinatorial optimization methods. CNT has also been grown from the tips of silicon cantilevers for use in atomic force microscopy.

Three-dimensional MEMS devices with functionalized carbon nanotubes

Abstract: Carbon Nano Tubes (CNT) with their unique structure, have already proven to be valuable in their application as tips for scanning probe microscopy, field emission devices, nanoelectronics, H2- storage, electromagnetic absorbers, ESD, EMI films and coatings and structural composites. For many of these applications, highly purified and functionalized CNT which are compatible with many host polymers are needed. A novel microwave CVD processing technique to meet these requirements has been developed at Penn State Center for the Engineering and Acoustic Materials and Devices (CEEAMD). This method enables the production of highly purified carbon nano tubes with variable size (from 5-40 nm) at lost cost (per gram) and high yield. Whereas, carbon nano tubes synthesized using the laser ablation or arc discharge evaporation method always include impurity due to catalyst or catalyst support. The Penn State research is based on the use of zeolites over other metal/metal oxides in the microwave field for a high production and uniformity of the product. An extended conventional purification method has been employed to purify our products in order to remove left over impurity. A novel composite structure can be tailored by functionalizing carbon nano tubes and chemically bonding them with the polymer matrix e.g. block or graft copolymer, or even cross-linked copolymer, to impart exceptional structural, electronic and surface properties. Bio- and Mechanical-MEMS devices derived from this hybrid composite are presented.© (2001) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

Microelectronics/nanoelectronics and the 21st century

Abstract: The advent of nonphotolithographic lithography, new electronic materials, and the devices, circuits, and systems they enable will see the electronics revolution of the 20th century to continue well into the 21st century. New lithographic techniques using tools such as nano-imprint and AFM are expected to lead to electronic circuits with lateral spatial resolution under 10 nm. When coupled with innovative materials such as those exhibiting giant magnetoresistance, new ultradense, ultrafast, nonvolatile memory is expected to ensue. New records are expected to be set in solid state laser output power when new wide bandgap semiconductors are combined with concepts such as the quantum cascade laser. Differential etching techniques that have proven efficacious in the design of surface emitting lasers are expected to propel bipolar transistor switching speeds into the THz spectrum with resultant logic devices clocking at well over 100 GHz. This increase will lead to improved signal processing capability. New advances in control of the phase stability of local oscillators and amplifiers will lead to electromagnetic systems with much greater Doppler resolution for radar and much better spectral utilization for communications systems. Devices and ICs combining semiconductors and magnetic spin states are expected to lead to a new class of ICs whose functionality can be dynamically changed in order to adapt optimally to the computational or sensing requirements of the moment. Further advances are expected to accrue in the area of nanophotonics, where device sizes can be smaller than the wavelength of the light they emit or receive.

MEMS- and NEMS-based smart devices and systems

Abstract: The microelectronics industry has seen explosive growth during the last thirty years. Extremely large markets for logic and memory devices have driven the development of new materials, and technologies for the fabrication of even more complex devices with features sized now don at the sub micron and nanometer level. Recent interest has arisen in employing these materials, tools and technologies for the fabrication of miniature sensors and actuators and their integration with electronic circuits to produce smart devices and systems. This effort offers the promise of: 1) increasing the performance and manufacturability of both sensors and actuators by exploiting new batch fabrication processes developed including micro stereo lithographic an micro molding techniques; 2) developing novel classes of materials and mechanical structures not possible previously, such as diamond like carbon, silicon carbide and carbon nanotubes, micro-turbines and micro-engines; 3) development of technologies for the system level and wafer level integration of micro components at the nanometer precision, such as self-assembly techniques and robotic manipulation; 4) development of control and communication systems for MEMS devices, such as optical and RF wireless, and power delivery systems, etc. A novel composite structure can be tailored by functionalizing carbon nano tubes and chemically bonding them with the polymer matrix e.g. block or graft copolymer, or even cross-linked copolymer, to impart exceptional structural, electronic and surface properties. Bio- and Mechanical-MEMS devices derived from this hybrid composite provide a new avenue for future smart systems. The integration of NEMS (NanoElectroMechanical Systems), MEMS, IDTs (Interdigital Transducers) and required microelectronics and conformal antenna in the multifunctional smart materials and composites results in a smart system suitable for sensing and control of a variety functions in automobile, aerospace, marine and civil structures and food and medical industries. This unique combination of technologies also results in novel conformal sensors that can be remotely sensed by an antenna system with the advantage of no power requirements at the sensor site. This paper provides a brief review of MEMS and NEMS based smart systems for various applications mentioned above. Carbon Nano Tubes (CNT) with their unique structure, have already proven to be valuable in their application as tips for scanning probe microscopy, field emission devices, nanoelectronics, H 2 -storage, electromagnetic absorbers, ESD, EMI films and coatings and structural composites. For many of these applications, highly purified and functionalized CNT which are compatible with many host polymers are needed. A novel microwave CVD processing technique to meet these requirements has been developed at Penn State Center for the engineering of Electronic and Acoustic Materials and Devices (CEEAMD). This method enables the production of highly purified carbon nano tubes with variable size (from 5-40 nm) at low cost (per gram) and high yield. Whereas, carbon nano tubes synthesized using the laser ablation or arc discharge evaporation method always include impurity due to catalyst or catalyst support. The Penn State research is based on the use of zeolites over other metal/metal oxides in the microwave field for a high production and uniformity of the product. An extended conventional purification method has been employed to purify our products in order to remove left over impurity. A novel composite structure can be tailored by functionalizing carbon nano tubes and chemically bonding them with the polymer matrix e.g. block or graft copolymer, or even cross- linked copolymer, to impart exceptional structural, electronic and surface properties. Bio- and Mechanical-MEMS devices derived from this hybrid composites will be presented.

Nano-electronics in a multiwall carbon nanotube

Abstract: Multiwall carbon nanotubes (MWNTs) are one of natural nano-size bricks. The MWNTs are conductive narrow wires, and would be useful materials for a component of nano-electronics. By building up the MWNT bricks, nano-scale device structures, which cannot be fabricated from three dimensional bulk materials, can be constructed. For the application of carbon nanotubes to molecular electronic devices, it is very important to control the contact resistance between metal and a nanotube. In order to get information on the origin of contact resistance, we have studied material dependence of the electrical transport in metal/MWNT/metal structure in metal-on-tube configuration. Furthermore, for the device construction, the nano-bricks need to be cut to fit to designed structures. We demonstrated an etching process to cut the MWNTs into three pieces for a single-electron transistor (SET). The SET is a useful device to show that the constructed structure has an expected small element. In the MWNT-SET, we observed the Coulomb blockade effect with island capacitance of 4.2 aF at 4.5 K. The observed Coulomb blockade effect meant a quite small island was formed in the MWNT.

Fabrication of self-organized carbon nanotubes on si substrates using nano-template by flame synthesis technique

Abstract: Carbon nanotubes (CNTs) have emerged as a viable electronic material for sensing and molecular electronic devices since discovery of carbon nanotubes [l]. In this early stage of research and development of C N T s for industrial applications, most of nanotubes are grown as randomly and entangled strings on substrates, which have little interests to engineers. For electronic device research, majority of research has been focused on manipulation of carbon nanotubes using STM or AFM to study the electrical transport effect [2-81. Highly ordered carbon nanotubes grown on Si substrate is imperative for electronic device applications. Several groups [9-131 reported growth of aligned carbon nanotubes. Li et al. [9] reported the first aligned carbon nanotubes directly on Silica substrate. This type of aligned carbon nanotubes has little applications for electronic devices because the nanotubes can not be isolated fiom each other. Recently, successful growth of vertically aligned multi-walled nanotubes (MWNTs) through the anodized aluminum oxide (MO) nano-porous template has attracted the engineers’ interests [ 113. This is because both the diameter and the length of nanotubes are controllable by using the template and also the A124 template provides a perfect insulating material for isolation of conductive nanotubes from each other. Suh et al. [12] also fabricated the similar nanotube array structure. However, the above highly ordered CNT arrays were successfully fabricated on aluminum substrates. Unfortunately, growth of highly ordered (vertically aligned) CNT arrays on silicon substrates was not successful. One group, Iwasaki et al. [13], tried fabrication of highly ordered CNT arrays on Si substrate. Their CNTs were sparsely grown on the substrate and the nano-template has no control of CNT growth. It is vital to fabricate CNT arrays directly on Si substrate with controllability for electronic device applications. 2

Effects of surface Fermi level pinning and surface state charging on control characteristics of nanometer scale Schottky gates formed on GaAs

Abstract: The purpose of this paper is to investigate the effect of the surface Fermi level pinning and surface state charging on gate control characteristics of nanometer-scale Schottky (nano-Schottky) gates on GaAs both theoretically and experimentally. This is a first attempt to establish a realistic model for complicated surface state phenomenon in III-V nanoelectronics.

Stereochemistry of carbon nanotubes for electronic applications

Abstract: Results are presented from studies to prepare carbon nanotubes of single geometry. Carbon nanotubes of certain stereochemistry have been found to be conductive. Others have been found to be excellent transistors, and together nanoelectronic devices have already been formed from them including logic gate circuits. Two synthetic approaches have been tried, namely plasma arcing in the presence of additives and ball milling. In plasma arcing, cathode deposits are altered by the presence of naphthalene in the feed material. The mixture of nanotubes so formed has a larger average void size than that formed in the absence of naphthalene. The results support proposed mechanisms of nanotube formation which involve growth by incorporation of carbon atoms into open tubes. They also show that naphthalene can be directly incorporated into fullerene black and thereby increase the number of hexagonal sheet structures in the carbon deposit. Work so far in ball milling has been confined to studies of the destruction of graphite crystalline phases.

Microelectronics roadmap: from ultimate CMOS to quantum information systems

Abstract: Summary form only given. The ITRS roadmap shows that scaling efforts will continue to a few tens of nanometers. This paper discusses the ITRS roadmap, leading to the ultimate CMOS and extrapolating to nanoelectronics. The major challenges are the fundamental limit of CMOS scaling and the increased number of global interconnects. Along the path to ultimate CMOS, vertical MOSFET and related devices are discussed. As we approach the nanometer scale, quantum behaviour plays an important role. The question is how to continue Moore's law in increasing functional throughput per unit cost. The paper gives examples for potential off-the-roadmap types of disruptive technologies as a base for discussion. Among these are quantum tunneling devices to increase functional throughput per device. We may also look at alternate architectures such as cellular automata, in which only nearest neighbor interconnects are needed and this type of architecture is most suitable for self-assembly of nanostructures. The self-assembly technique has potential for low cost nanostructure fabrication. Controlled placement of self-organized structures is discussed. In this scheme, semiconductor quantum dots were grown on Si. The dot size, shape and density can be controlled by growth temperature, deposited coverage and doping. Cooperative, well-organized Ge quantum dots were achieved and they offered potential applications of dot arrays for potential cellular systems. Eventually, entirely new massive parallel quantum computation systems may evolve. A possible semiconductor implementation based on SiGe nanostructures is discussed.