D
Dae-Gyu Park
Researcher at IBM
Publications - 150
Citations - 3119
Dae-Gyu Park is an academic researcher from IBM. The author has contributed to research in topics: Gate dielectric & Gate oxide. The author has an hindex of 31, co-authored 150 publications receiving 3068 citations. Previous affiliations of Dae-Gyu Park include SK Hynix & GlobalFoundries.
Papers
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Patent
Method of stabilizing hydrogenated amorphous silicon and amorphous hydrogenated silicon alloys
Bahman Hekmatshoartabari,Marinus Hopstaken,Dae-Gyu Park,Devendra K. Sadana,Ghavam G. Shahidi,Davood Shahrjerdi +5 more
TL;DR: In this article, a deuterium-containing atmosphere is introduced to the lattice of the hydrogenated amorphous silicon containing material through the surface of the HOG, which increases the stability of HOG.
Patent
METHOD OF PE-ALD OF SiNxCy AND INTEGRATION OF LINER MATERIALS ON POROUS LOW K SUBSTRATES
Andrew J. Kellock,Hyungjun Kim,Dae-Gyu Park,Satyanarayana V. Nitta,Sampath Purushothaman,Stephen M. Rossnagel,Oscar van der Straten +6 more
TL;DR: In this article, a method of depositing a SiN x C y liner on a porous low thermal conductivity (low-k) substrate by plasma-enhanced atomic layer deposition (PE-ALD) was proposed.
Patent
Method of forming a metal gate in a semiconductor device
TL;DR: In this article, a method for forming a metal gate capable of preventing degradation in a characteristic of a gate insulating film upon formation of the metal gate is described, which is based on the atomic layer deposition (ALD) process or remote plasma chemical vapor deposition (CVD) process.
Journal ArticleDOI
Sharp Reduction of Contact Resistivities by Effective Schottky Barrier Lowering With Silicides as Diffusion Sources
Zhen Zhang,Francois Pagette,Christopher P. D'Emic,Bin Yang,Christian Lavoie,Yu Zhu,Marinus Hopstaken,Siegfried L. Maurer,Conal E. Murray,M. Guillorn,D. Klaus,J.J. Bucchignano,John Bruley,John A. Ott,A. Pyzyna,J. Newbury,W. Song,V Chhabra,G. Zuo,K.-L. Lee,Ahmet S. Ozcan,J. Silverman,Q.C. Ouyang,Dae-Gyu Park,Wilfried Haensch,Paul M. Solomon +25 more
TL;DR: In this article, an extremely low contact resistivity of 6-7 × 10-9 Ω·cm2 between Ni0.9Pt0.1Si and heavily doped Si is achieved through Schottky barrier engineering by dopant segregation.
Proceedings ArticleDOI
A manufacturable dual channel (Si and SiGe) high-k metal gate CMOS technology with multiple oxides for high performance and low power applications
Siddarth A. Krishnan,Unoh Kwon,Naim Moumen,Matthew W. Stoker,Eric C. Harley,Stephen W. Bedell,Deleep R. Nair,B. Greene,William K. Henson,Murshed M. Chowdhury,D.P. Prakash,Ernest Y. Wu,Dimitris P. Ioannou,Eduard A. Cartier,Myung-Hee Na,S. Inumiya,Kevin McStay,Lisa F. Edge,Ryosuke Iijima,Jin Cai,Martin M. Frank,M. Hargrove,Dechao Guo,Andreas Kerber,Hemanth Jagannathan,Takashi Ando,Joseph F. Shepard,Shahab Siddiqui,Min Dai,Huiming Bu,J. Schaeffer,Jaeger Daniel,Kathy Barla,Thomas A. Wallner,S. Uchimura,Y. Lee,Gauri Karve,Sufi Zafar,Dominic J. Schepis,Yun-Yu Wang,Ricardo A. Donaton,S. Saroop,P. Montanini,Yue Liang,James H. Stathis,Richard Carter,Rohit Pal,Vamsi Paruchuri,H. Yamasaki,J-H Lee,Martin Ostermayr,J.-P. Han,Yue Hu,Michael A. Gribelyuk,Dae-Gyu Park,X. Chen,Srikanth Samavedam,Shreesh Narasimha,Paul D. Agnello,Mukesh Khare,R. Divakaruni,Vijay Narayanan,Michael P. Chudzik +62 more
TL;DR: In this article, the authors leverage the superior mobility, low threshold voltage and NBTI of cSiGe channels in high-performance (HP) and low power (LP) high-к/metal gate (HKMG) logic MOSFETs with multiple oxides utilizing dual channels for nFET and pFET.