E
E. Van Moorhem
Researcher at Katholieke Universiteit Leuven
Publications - 5
Citations - 142
E. Van Moorhem is an academic researcher from Katholieke Universiteit Leuven. The author has contributed to research in topics: High-κ dielectric & Germanium. The author has an hindex of 4, co-authored 5 publications receiving 142 citations. Previous affiliations of E. Van Moorhem include IMEC.
Papers
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Journal ArticleDOI
Optimisation of a thin epitaxial Si layer as Ge passivation layer to demonstrate deep sub-micron n- and p-FETs on Ge-On-Insulator substrates
B. De Jaeger,Renaud Bonzom,Frederik Leys,O. Richard,J. Van Steenbergen,Gillis Winderickx,E. Van Moorhem,G. Raskin,Fabrice Letertre,T. Billon,Marc Meuris,M.M. Heyns +11 more
TL;DR: In this article, a thin epitaxially grown Si layer is used as the high-k dielectric to obtain low interface state density and high carrier mobility for Ge MOSFETs.
Journal ArticleDOI
The future of high-K on pure germanium and its importance for Ge CMOS
M. Meuris,Annelies Delabie,S. Van Elshocht,S. Kubicek,Peter Verheyen,B. De Jaeger,J. Van Steenbergen,G. Winderickx,E. Van Moorhem,Riikka L. Puurunen,Bert Brijs,Matty Caymax,Thierry Conard,Olivier Richard,Wilfried Vandervorst,Chao Zhao,S. De Gendt,Tom Schram,T. Chiarella,Bart Onsia,I. Teerlinck,Michel Houssa,Paul Mertens,G. Raskin,P. Mijlemans,Serge Biesemans,Marc Heyns +26 more
TL;DR: In this paper, a comparison between ALCVD and metal organic chemical vapor deposition (MOCVD) HfO2 layers on Ge indicate that ALCVD layers have some improved capacitor characteristics.
Journal ArticleDOI
Ge Deep Sub-Micron HiK/MG pFET with Superior Drive Compared to Si HiK/MG State-of-the-Art Reference
B. DeJaeger,B. Kaczer,Paul Zimmerman,Karl Opsomer,Gillis Winderickx,J. Van Steenbergen,E. Van Moorhem,Renaud Bonzom,Frederik Leys,Chantal J. Arena,Matthias Bauer,C. Werkhoven,Marc Meuris,M.M. Heyns +13 more
TL;DR: In this paper, the authors present results on conventional, deep sub-micron short-channel Ge p-and nFET devices with a HiK/MG gate stack and NiGe source/drain regions.
Proceedings ArticleDOI
Ge deep sub-micron pFETs with etched TaN metal gate on a high-k dielectric, fabricated in a 200mm silicon prototyping line
B. De Jaeger,Michel Houssa,Alessandra Satta,Stefan Kubicek,Peter Verheyen,J. Van Steenbergen,J. Croon,Ben Kaczer,S. Van Elshocht,Annelies Delabie,Eddy Kunnen,Erik Sleeckx,Ivo Teerlinck,Richard Lindsay,Tom Schram,Thomas Chiarella,Robin Degraeve,Thierry Conard,J. Poortmans,Gillis Winderickx,Werner Boullart,Marc Schaekers,Paul W. Mertens,Matty Caymax,Wilfried Vandervorst,E. Van Moorhem,Serge Biesemans,K. De Meyer,Lars-Ake Ragnarsson,Sun-Ghil Lee,G. Kota,G. Raskin,P. Mijlemans,JL Autran,Valery V. Afanas'ev,Andre Stesmans,M. Meuris,M.M. Heyns +37 more
TL;DR: In this article, the authors reported the first time on deep sub-micron Ge pFETs with physical gate lengths down to 0.151 /spl mu/m using a silicon-like process flow, with a directly etched gate stack consisting of TaN gate on an ALD or MOCVD HfO/sub 2/ dielectric.
Book ChapterDOI
Germanium Deep-Submicron p -FET and n -FET Devices, Fabricated on Germanium-On-Insulator Substrates
M. Meuris,B. De Jaeger,J. Van Steenbergen,R. Bonzom,Matty Caymax,Michel Houssa,Ben Kaczer,Frederik Leys,Koen Martens,Karl Opsomer,A. M. Pourghaderi,A. Satta,Eddy Simoen,V. Terzieva,E. Van Moorhem,G. Winderickx,Roger Loo,Trudo Clarysse,Thierry Conard,Annelies Delabie,David Hellin,Tom Janssens,Bart Onsia,S. Sioncke,Paul Mertens,J. Snow,S. Van Elshocht,Wilfried Vandervorst,Paul Zimmerman,David P. Brunco,G. Raskin,Fabrice Letertre,Takeshi Akatsu,T. Billon,Marc Heyns +34 more
TL;DR: In this article, a review on some possible treatments to passivate the Ge surface is discussed, and the activation of p- and n-type dopants to form the active areas in devices is discussed.