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Fabrizio Lombardi

Researcher at Northeastern University

Publications -  677
Citations -  12743

Fabrizio Lombardi is an academic researcher from Northeastern University. The author has contributed to research in topics: Fault detection and isolation & Redundancy (engineering). The author has an hindex of 51, co-authored 639 publications receiving 10357 citations. Previous affiliations of Fabrizio Lombardi include Helsinki University of Technology & Fudan University.

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Journal ArticleDOI

CNTFET-Based Design of Ternary Logic Gates and Arithmetic Circuits

TL;DR: A novel design technique for ternary logic gates based onCNTFETs is proposed and compared with the existing resistive-load CNTFET logic gate designs, which provides an excellent speed and power consumption characteristics in datapath circuit such as full adder and multiplier.
Journal ArticleDOI

New Metrics for the Reliability of Approximate and Probabilistic Adders

TL;DR: New metrics are proposed for evaluating the reliability as well as the power efficiency of approximate and probabilistic adders and it is shown that the MED is an effective metric for measuring the implementation accuracy of a multiple-bit adder and that the NED is a nearly invariant metric independent of the size of an adder.
Journal ArticleDOI

Design and Analysis of Approximate Compressors for Multiplication

TL;DR: The results show that the proposed designs accomplish significant reductions in power dissipation, delay and transistor count compared to an exact design; moreover, two of the proposed multiplier designs provide excellent capabilities for image multiplication with respect to average normalized error distance and peak signal-to-noise ratio.
Proceedings ArticleDOI

A low-power, high-performance approximate multiplier with configurable partial error recovery

TL;DR: It is shown that by utilizing an appropriate error recovery, the proposed approximate multiplier achieves similar processing accuracy as traditional exact multipliers but with significant improvements in power and performance.
Proceedings ArticleDOI

Approximate XOR/XNOR-based adders for inexact computing

TL;DR: Simulation by Cadence's Spectre in TSMC 65nm process has shown that the proposed designs consume less power and have better performance compared to the accurate XOR/XNOR-based adder, while the error distance remains similar or better than other approximate adder designs.