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Proceedings ArticleDOI

Accurate drain conductance modeling for distortion analysis in MOSFETs

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TLDR
In this article, a new circuit-level MOSFET model has been developed which gives accurate results for distortion analysis, and incorporates a more precise description of various physical phenomena such as velocity saturation, channel length modulation, static feedback and self-heating.
Abstract
Present compact circuit-level MOSFET models fail to accurately describe distortion effects, which is partly due to an imprecise modeling of conductance A new MOS model has been developed which gives accurate results for distortion analysis, and incorporates a more precise description of various physical phenomena such as velocity saturation, channel length modulation, static feedback and self-heating

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Citations
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Journal ArticleDOI

RF-CMOS performance trends

TL;DR: In this paper, the impact of scaling on the analog performance of MOS devices at RF frequencies was studied and a scaling methodology for RF-CMOS based on limited linearity degradation was proposed.
Journal ArticleDOI

A CMOS switched transconductor mixer

TL;DR: In this article, the performance of the switched transconductor mixer was compared with the conventional active mixer, demonstrating competitive performance at a lower supply voltage, and the new mixer has a fundamental noise benefit, as noise produced by the switch-transistors and LO-port is common mode noise, which is rejected at the differential output.
Journal ArticleDOI

RF circuit implications of moderate inversion enhanced linear region in MOSFETs

TL;DR: In this article, the third-order intermodulation distortion in a MOSFET amplifier is analyzed by means of Volterra Series representation, which reveals a significant peaking of the thirdorder intercept point in the moderate inversion region.
BookDOI

Device Modeling for Analog and RF CMOS Circuit Design: Ytterdal/Device

TL;DR: The BSIM4 MOSFET model as discussed by the authors has been used for accurate distortion analysis of passive devices in CMOS technologies, and the EKV model has also been used to model process variations and device mismatches.
Proceedings ArticleDOI

Accurate thermal noise model for deep-submicron CMOS

TL;DR: In this article, a surfacepotential-based compact MOS model with improved descriptions of carrier mobility and velocity saturation was used to evaluate drain current thermal noise for three different CMOS technologies and for gate lengths ranging from 2 /spl mu/m down to 0.17 /spl µ/m.
References
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BookDOI

Compact transistor modelling for circuit design

TL;DR: In this article, the authors describe analytical compact transistor models that can be used in circuit simulation programs like SPICE, including Boltzmann transport equation, continuity equation, Poisson equation, and physical modelling of mobility, recombination, bandgap narrowing, avalanche multiplication and noise.
Journal ArticleDOI

A physical and scalable I-V model in BSIM3v3 for analog/digital circuit simulation

TL;DR: A new physical and continuous BSIM (Berkeley Short-Channel IGFET Model) I-V model in BSIM3v3 is presented for circuit simulation, which allows users to accurately describe the MOSFET characteristics over a wide range of channel lengths and widths for various technologies, and is attractive for statistical modeling.
Journal ArticleDOI

A simple two-dimensional model for IGFET operation in the saturation region

TL;DR: In this paper, a model for an IGFET operating in saturation and accounting for the two-dimensional potential distribution in the section of the surface space-charge region adjacent to the drain is developed.
Journal ArticleDOI

A mobility model for carriers in the MOS inversion layer

TL;DR: In this article, a mobility model for carriers in the MOS inversion layer is proposed, which assumes that mobility is a function of the gate and drain fields, and the doping density, which conforms to Thornber's scaling law.

Compact MOS modelling for analog circuit simulation

TL;DR: The Philips MOS MODEL 9 is presented with the successful confrontation with analog requirements, the scaling of parameters with geometry, the accuracy of the model over the whole geometry range of a process, its capabilities in the description of various processes at least down to 0.35 /spl mu/m and a comparison with advanced analog models available in commercial circuit simulators.
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