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A CMOS switched transconductor mixer

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TLDR
In this article, the performance of the switched transconductor mixer was compared with the conventional active mixer, demonstrating competitive performance at a lower supply voltage, and the new mixer has a fundamental noise benefit, as noise produced by the switch-transistors and LO-port is common mode noise, which is rejected at the differential output.
Abstract
A new CMOS active mixer topology can operate at low supply voltages by the use of switches exclusively connected to the supply voltages. Such switches require less voltage headroom and avoid gate-oxide reliability problems. Mixing is achieved by exploiting two transconductors with cross-coupled outputs, which are alternatingly activated by the switches. For ideal switching, the operation is equivalent to a conventional active mixer. This paper analyzes the performance of the switched transconductor mixer, in comparison with the conventional mixer, demonstrating competitive performance at a lower supply voltage. Moreover, the new mixer has a fundamental noise benefit, as noise produced by the switch-transistors and LO-port is common mode noise, which is rejected at the differential output. An experimental prototype with 12-dB conversion gain was designed and realized in standard 0.18-/spl mu/m CMOS to operate at only a 1-V supply. Experimental results show satisfactory mixer performance up to 4 GHz and confirm the fundamental noise benefit.

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Journal ArticleDOI

A low-voltage folded-switching mixer in 0.18-/spl mu/m CMOS

TL;DR: In this article, a low voltage, low power, AC-coupled folded-switching mixer with current-reuse is presented, where the main advantages of the introduced mixer topology are: high voltage gain, moderate noise figure, moderate linearity, and operation at low supply voltages.
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Design and Analysis of Low Flicker-Noise CMOS Mixers for Direct-Conversion Receivers

TL;DR: In this article, a double-balanced Gilbert-type mixer using the current bleeding technique with two resonating inductors has been designed to improve conversion gain and flicker-noise performance.
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A 0.6-V Zero-IF/Low-IF Receiver With Integrated Fractional-N Synthesizer for 2.4-GHz ISM-Band Applications

TL;DR: This paper presents the design of an ultra-low voltage, low power and highly integrated dual-mode receiver for 2.4-GHz ISM-band applications, and discusses the design challenges at low voltage supplies such as limited fT for transistors and higher nonlinearities due to limited available signal swing.
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A 10 mW Bluetooth Low-Energy Transceiver With On-Chip Matching

TL;DR: A mass-produced Bluetooth Low-Energy transceiver is presented in classic double frequency VCO architecture fabricated in TSMC 55 nm CMOS, higher than recently published experimental sliding-IF designs, but it does not suffer from their inherent susceptibility to blocking and pulling.
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A 0.5–7.5 GHz Ultra Low-Voltage Low-Power Mixer Using Bulk-Injection Method by 0.18- $\mu$ m CMOS Technology

TL;DR: In this article, a fully differential low-voltage low-power downconversion mixer using a TSMC 0.18-mum CMOS logic process is presented, and the mixer was designed with a four-terminal MOS transistor, the radiofrequency (RF) and local-oscillator signals apply to the gate and bulk of the device, respectively while the intermediate frequency (IF) signals output was from the drain, the mixer features a maximum conversion gain of 5.7dB at 2.4 GHz, an ultra low dc power consumption of 0.48 m
References
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Journal ArticleDOI

Noise in RF-CMOS mixers: a simple physical model

TL;DR: In this paper, a qualitative physical model was developed to explain the mechanisms responsible for flicker noise in mixers, and simple equations were derived to estimate the flicker and white noise at the output of a switching active mixer.
Journal ArticleDOI

Switched-opamp: an approach to realize full CMOS switched-capacitor circuits at very low power supply voltages

TL;DR: In this article, a switch-opamp-based low-voltage analog CMOS filter was implemented in a 2.4-/spl mu/m CMOS process with V/sub T/=/spl plusmn/0.9 V.
Journal ArticleDOI

Noise in current-commutating CMOS mixers

TL;DR: In this paper, a noise analysis of current-commutating CMOS mixers, such as the widely used CMOS Gilbert cell, is presented, where the contribution of all internal and external noise sources to the output noise is calculated.
Journal ArticleDOI

Intermodulation distortion in current-commutating CMOS mixers

TL;DR: The nonlinearity behavior of CMOS current-switching mixers is investigated by treating the mixer as a periodically-time-varying weakly nonlinear circuit and the significance of a physical transistor model for reliable distortion simulation is demonstrated.
Journal ArticleDOI

A 2 V CMOS cellular transceiver front-end

TL;DR: In this paper, the authors present the design and implementation of a 2-V cellular transceiver front-end in a standard 0.25-/spl mu/m CMOS technology.
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