Journal ArticleDOI
Miller and noise effects in a synchronizing flip-flop
C. Dike,Edward A. Burton +1 more
TLDR
In this paper, the effects of Miller coupling and thermal noise on a synchronizing flip-flop are described and a worst case mean-time-between-failure bound is established.Abstract:
The effects of Miller coupling and thermal noise on a synchronizing flip-flop are described. Data on the metastability characteristics of the flip-flop are gathered and analyzed. True metastability is distinguished from the deterministic region. A worst case mean-time-between-failure bound is established. A simple and accurate test method is presented. A simple jamb latch was used with driving circuits of two different strengths to determine the role of input strength on T/sub m/ and /spl tau/. The flip-flop was fabricated on a 0.25-/spl mu/m CMOS process.read more
Citations
More filters
Journal ArticleDOI
Razor-Lite: A Light-Weight Register for Error Detection by Observing Virtual Supply Rails
TL;DR: Razor-Lite is a new EDAC register that addresses the issue of area and energy overheads by adding only 8 additional transistors to a conventional flip-flop design by achieving low overhead via a charge-sharing technique that attaches to a standard flip- flop without modifying its design.
Proceedings ArticleDOI
The Devolution of Synchronizers
TL;DR: These measurements are described and validated with circuit analysis and simulations, demonstrating the devolution of synchronization parameters, showing a significant increase in 65nm relative to older generations.
Proceedings ArticleDOI
An OCP Compliant Network Adapter for GALS-based SoC Design Using the MANGO Network-on-Chip
TL;DR: An OCP compliant network adapter (NA) architecture for the MANGO NoC decouples communication and computation, providing memory-mapped OCP transactions based on primitive message-passing services of the network.
The MANGO clockless network-on-chip: Concepts and implementation
Tobias Bjerregaard,Jens Sparsø +1 more
TL;DR: This paper presents the MANGO NoC, and explains how its key characteristics (clockless implementation, standard socket access points and guaranteed communication services) make MANGO suitable for a modular SoC design flow.
DissertationDOI
Globally-asynchronous locally-synchronous architectures for VLSI systems
TL;DR: In this article, the authors propose a method to solve the problem of "uniformity" and "uncertainty" in the context of health care, and propose a solution.
References
More filters
Journal ArticleDOI
Metastability of CMOS latch/flip-flop
Lee-Sup Kim,Robert W. Dutton +1 more
TL;DR: In this article, the authors used the AC small-signal analysis in the frequency domain instead of the usual time-domain approach to obtain the optimal device size, aspect ratio, and configurations for the design of the metastable hardened CMOS latch/flip-flops.
Journal ArticleDOI
Synchronization reliability in CMOS technology
TL;DR: In this article, the synchronization performance of CMOS circuits is examined theoretically and experimentally, and the phase characteristics of metastability are identified, and experimental measurements of error rate are made on a CMOS test circuit and the gain-bandwidth product for the circuit is determined.
Journal ArticleDOI
A fast resolving BiNMOS synchronizer for parallel processor interconnect
TL;DR: In this paper, the authors describe the design, testing, and application of a BiNMOS metastability resolving synchronizer, which reduces metastability failure with a high gain-bandwidth product and longer settling time per clock cycle.