Proceedings ArticleDOI
Monolithic 3D BEOL FinFET switch arrays using location-controlled-grain technique in voltage regulator with better FOM than 2D regulators
Ping-Yi Hsieh,Chien-Chi Huang,Ming-Chi Tai,Wei-Chung Lo,Chang-Hong Shen,Jia-Min Shieh,Da-Chiang Chang,Kuan-Neng Chen,Wen-Kuan Yeh,Chenming Hu,Yi-Jui Chang,Pin-Jun Chen,Chun-Liang Chen,Chih-Chao Yang,Po-Tsang Huang,Yi-Jing Chen,Chih-Ming Shen,Yu-Wei Liu +17 more
- pp 8993441
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TLDR
In this article, a 3D back-end of line (BEOL) FinFET switch arrays are demonstrated in large single crystalline Si islands (2.56 μm2), whose location, size and shape are determined by design.Abstract:
Monolithic 3D back-end of line (BEOL) FinFET switch arrays are demonstrated in large single crystalline Si islands (2.56 μm2), whose location, size and shape are determined by design. Details of the improved location-controlled-grain (LCG) technique are presented. A voltage regulator implemented with the BEOL switch arrays using external control signals shows better theoretical figure of merit (FOM) of 0.089ns than 2D voltage regulators of 0.43ns.read more
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Journal ArticleDOI
A Review of Low Temperature Process Modules Leading Up to the First (≤500 °C) Planar FDSOI CMOS Devices for 3-D Sequential Integration
Claire Fenouillet-Beranger,Laurent Brunet,Perrine Batude,L. Brevard,X. Garros,M. Casse,Joris Lacord,Benoit Sklenard,P. Acosta-Alba,Sebastien Kerdiles,A. Tavernier,C. Vizioz,Pascal Besson,R. Gassilloud,J.-M. Pedini,J. Kanyandekwe,Frédéric Mazen,A. Magalhaes-Lucas,C. Cavalcante,D. Bosch,M. Ribotta,V. Lapras,Maud Vinet,Francois Andrieu,J. Arcamone +24 more
TL;DR: In this article, a review of low temperature (LT) (≤500 °C) process modules in view of 3-D sequential integration is presented, where the bottom device thermal stability and intermediate back end of line (iBEOL) versus thermal anneal and ns-laser annealing is determined, setting up the top device temperature fabrication process at 500 °C during a couple of hours.
Journal ArticleDOI
Proposal and Experimental Demonstration of Ultrathin-Body (111) InAs-On-Insulator nMOSFETs With L Valley Conduction
TL;DR: In this article, the authors proposed Ultrathin-body (UTB) (111) InAs-On-Insulator (InAs-OI) n-channel metal-oxide-semiconductor field effect transistors (nMOSFETs) for the L-valve conduction in III-V channels.
Proceedings ArticleDOI
Low Temperature and Ion-Cut Based Monolithic 3D Process Integration Platform Incorporated with CMOS, RRAM and Photo-Sensor Circuits
Hoonhee Han,Rino Choi,Seong-Ook Jung,Sung Woo Chung,Byung Jin Cho,S. C. Song,Chang Hwan Choi +6 more
TL;DR: In this paper, low temperature (2 O 5 -RRAM and a-IGZO photo detector devices on the upper transferred Si layer were vertically stacked with CMOS circuits and the functionalities of ion-cut based M3D integration platform are confirmed by higher frequency and current level with respect to light intensity.
Journal ArticleDOI
Single-Crystal Islands (SCI) for Monolithic 3-D and Back-End-of-Line FinFET Circuits
Yu-Wei Liu,Han-Wen Hu,Ping-Yi Hsieh,Hao-Tung Chung,Shu-Jui Chang,Jui-Han Liu,Po-Tsang Huang,Chih-Chao Yang,Chang-Hong Shen,Jia-Min Shieh,Kuan-Neng Chen,Chenming Hu +11 more
TL;DR: In this paper, a single-crystal islands (SCI) technique using low thermal budget pulse laser process is proposed and demonstrated to fabricate singlecrystal silicon islands over amorphous dielectric for monolithic 3D and back-end-of-line (BEOL) FinFET circuits.
Patent
3D microdisplay device and structure
Zvi Or-Bach,Deepak C. Sekar +1 more
TL;DR: A 3D micro display with at least one LED driving circuit and a plurality of light emitting diodes (LEDs) can be found in this paper with a vertical distance of less than ten microns.