Journal ArticleDOI
Nanowire-based programmable architectures
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TLDR
This work develops nanowire-based architectures which can bridge between lithographic and atomic-scale feature sizes and tolerate defective and stochastic assembly of regular arrays to deliver high density universal computing devices.Abstract:
Chemists can now construct wires which are just a few atoms in diameter; these wires can be selectively field-effect gated, and wire crossings can act as diodes with programmable resistance. These new capabilities present both opportunities and challenges for constructing nanoscale computing systems. The tiny feature sizes offer a path to economically scale down to atomic dimensions. However, the associated bottom-up synthesis techniques only produce highly regular structures and come with high defect rates and minimal control during assembly. To exploit these technologies, we develop nanowire-based architectures which can bridge between lithographic and atomic-scale feature sizes and tolerate defective and stochastic assembly of regular arrays to deliver high density universal computing devices. Using 10nm pitch nanowires, these nanowire-based programmable architectures offer one to two orders of magnitude greater mapped-logic density than defect-free lithographic FPGAs at 22nm.read more
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References
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Journal ArticleDOI
High Performance Silicon Nanowire Field Effect Transistors
TL;DR: In this article, the influence of source-drain contact thermal annealing and surface passivation on key transistor properties was examined, and it was shown that thermal annaling and passivation of oxide defects using chemical modification can increase the average transconductance from 45 to 800 nS and average mobility from 30 to 560 cm 2 /V
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Logic gates and computation from assembled nanowire building blocks.
TL;DR: It is shown that crossed nanowire p-n junctions and junction arrays can be assembled in over 95% yield with controllable electrical characteristics, and in addition, that these junctions can be used to create integrated nanoscale field-effect transistor arrays with nanowires as both the conducting channel and gate electrode.
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Epitaxial core–shell and core–multishell nanowire heterostructures
TL;DR: The synthesis of core–multishell structures, including a high-performance coaxially gated field-effect transistor, indicates the general potential of radial heterostructure growth for the development of nanowire-based devices.
Journal Article
SIS : A System for Sequential Circuit Synthesis
TL;DR: This paper provides an overview of SIS and contains descriptions of the input specification, STG (state transition graph) manipulation, new logic optimization and verification algorithms, ASTG (asynchronous signal transition graph] manipulation, and synthesis for PGA’s (programmable gate arrays).
Journal ArticleDOI
Carbon nanotube-based nonvolatile random access memory for molecular computing
TL;DR: A concept for molecular electronics exploiting carbon nanotubes as both molecular device elements and molecular wires for reading and writing information was developed and the viability of this concept is demonstrated by detailed calculations and by the experimental realization of a reversible, bistable nanotube-based bit.