Parametric Trojans for Fault-Injection Attacks on Cryptographic Hardware
Raghavan Kumar,Philipp Jovanovic,Wayne Burleson,Ilia Polian +3 more
- pp 18-28
TLDR
In this article, the authors propose two extremely stealthy hardware Trojans that facilitate fault-injection attacks in cryptographic blocks. But they do not describe how they can be used to inject faults into an ASIC implementation of the recently introduced lightweight cipher PRINCE.Abstract:
We propose two extremely stealthy hardware Trojans that facilitate fault-injection attacks in cryptographic blocks. The Trojans are carefully inserted to modify the electrical characteristics of predetermined transistors in a circuit by altering parameters such as doping concentration and do pant area. These Trojans are activated with very low probability under the presence of a slightly reduced supply voltage (0.001 for 20% Vdd reduction). We demonstrate the effectiveness of the Trojans by utilizing them to inject faults into an ASIC implementation of the recently introduced lightweight cipher PRINCE. Full circuit-level simulation followed by differential cryptanalysis demonstrate that the secret key can be reconstructed after around 5 fault-injections.read more
Citations
More filters
Proceedings ArticleDOI
A2: Analog Malicious Hardware
TL;DR: This paper shows how a fabrication-time attacker can leverage analog circuits to create a hardware attack that is small (i.e., requires as little as one gate) and stealthy and requires an unlikely trigger sequence before effecting a chip's functionality.
Proceedings ArticleDOI
An inside job: Remote power analysis attacks on FPGAs
TL;DR: In this article, the authors present a design methodology dedicated to FPGAs which allows measuring a fraction of the dynamic power consumption, and demonstrate key-recovery attacks confirming the applicability of the underlying measurement methodology.
Proceedings ArticleDOI
A survey on hardware trojan detection techniques
TL;DR: Several techniques for detecting malicious modification of circuit introduced at different phases of the design flow are surveyed and their capabilities limitations in thwarting hardware Trojans are highlighted.
Journal ArticleDOI
An Overview of Hardware Security and Trust: Threats, Countermeasures, and Design Tools
TL;DR: An overview of hardware security and trust from the perspectives of threats, countermeasures, and design tools is presented to motivate hardware designers and electronic design automation tool developers to consider the new challenges and opportunities of incorporating an additional dimension of security into robust hardware design, testing, and verification.
Journal ArticleDOI
A Flexible Online Checking Technique to Enhance Hardware Trojan Horse Detectability by Reliability Analysis
Rajat Subhra Chakraborty,Samuel Pagliarini,Jimson Mathew,Sree Ranjani Rajendran,M. Nirmala Devi +4 more
TL;DR: A low-overhead detection technique which inserts malicious logic detection circuitry at netlist sites chosen by an algorithm that employs an intelligent and accurate analysis of fault propagation through logic gates.
References
More filters
Journal ArticleDOI
A Survey of Hardware Trojan Taxonomy and Detection
TL;DR: A classification of hardware Trojans and a survey of published techniques for Trojan detection are presented.
Journal ArticleDOI
The Sorcerer's Apprentice Guide to Fault Attacks
TL;DR: The various methods that can be used to induce faults in semiconductors and exploit such errors maliciously are covered and a series of countermeasures to thwart these attacks are described.
Book ChapterDOI
PRINCE: a low-latency block cipher for pervasive computing applications
Julia Borghoff,Anne Canteaut,Tim Güneysu,Elif Bilge Kavun,Miroslav Knezevic,Lars R. Knudsen,Gregor Leander,Ventzislav Nikov,Christof Paar,Christian Rechberger,Peter Maria Franciscus Rombouts,Søren S. Thomsen,Tolga Yalcin +12 more
TL;DR: In this paper, a block cipher called PRINCE is proposed that allows encryption of data within one clock cycle with a very competitive chip area compared to known solutions. But it does not have the α-reflection property, which holds that decryption for one key corresponds to encryption with another key.
Journal ArticleDOI
Fault Injection Attacks on Cryptographic Devices: Theory, Practice, and Countermeasures
TL;DR: A comprehensive description of fault injection attacks on cryptographic devices and the countermeasures that have been developed against them and a discussion on the interaction between fault injections and the corresponding countermeasures and power analysis attacks.
Posted Content
PRINCE – A Low-latency Block Cipher for Pervasive Computing Applications
Julia Borghoff,Anne Canteaut,Tim Güneysu,Elif Bilge Kavun,Miroslav Knežević,Lars R. Knudsen,Gregor Leander,Ventzislav Nikov,Christof Paar,Christian Rechberger,Peter Maria Franciscus Rombouts,Søren S. Thomsen,Tolga Yalcin +12 more
TL;DR: This paper presents a block cipher that is optimized with respect to latency when implemented in hardware and holds that decryption for one key corresponds to encryption with a related key, which is of independent interest and proves its soundness against generic attacks.