Patent
Structures and methods for forming shielded gate field effect transistors
TLDR
In this article, a field effect transistor is formed as follows: a trench is formed in a semiconductor region, and a dielectric layer lining the trench sidewalls and bottom is formed.Abstract:
A field effect transistor is formed as follows. A trench is formed in a semiconductor region. A dielectric layer lining the trench sidewalls and bottom is formed. The trench is filled with a conductive material. The conductive material is recessed into the trench to thereby form a shield electrode in a bottom portion of the trench. The recessing of the conductive material includes isotropic etching of the conductive material. An inter-electrode dielectric (IED) is formed over the recessed shield electrode.read more
Citations
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Patent
Structures and methods for improving trench-shielded semiconductor devices and schottky barrier rectifier devices
Thomas E. Grebs,Mark L. Rinehimer,Joseph A. Yedinak,Dean E. Probst,Gary M. Dolny,John L. Benjamin +5 more
TL;DR: In this article, various structures and methods for improving the performance of trench-shielded power semiconductor devices and the like are described, and the authors also describe various methods to improve the performance.
Patent
Trench-based power semiconductor devices with increased breakdown voltage characteristics
Joseph A. Yedinak,Ashok Challa +1 more
TL;DR: Exemplary power semiconductor devices with features providing increased breakdown voltage and other benefits are disclosed in this article, where the authors present a comparison of different types of power semiconductors with different benefits.
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Patent
Shielded Gate Field Effect Transistor
TL;DR: In this paper, the authors propose a semiconductor region consisting of a substrate of a first conductivity type and a first silicon region of a second conductivity over the substrate, where the substrate has a laterally graded doping concentration decreasing in a direction away from the sidewalls of the lower trench portion.
References
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Patent
Power semiconductor devices and methods of manufacture
Ashok Challa,Alan Elbanhawy,Thomas E. Grebs,Nathan Kraft,Dean E. Probst,Rodney S. Ridley,Steven Sapp,Qi Wang,Chongman Yun,J.G. Lee,Peter H. Wilson,Joseph A. Yedinak,J.Y. Jung,Hocheol Jang,Babak S. Sani,Richard Stokes,Gary M. Dolny,John Mytych,Becky Losee,Adam Selsley,Robert Herrick,James J. Murphy,Gordon K. Madson,Bruce D. Marchant,Christopher L. Rexer,Christopher Boguslaw Kocon,Debra S. Woolsey +26 more
TL;DR: In this article, a number of charge balancing techniques and other techniques for reducing parasitic capacitance to arrive at different embodiments for power devices with improved voltage performance, higher switching speed, and lower on-resistance.
Patent
Power semiconductor devices having improved high frequency switching and breakdown characteristics
TL;DR: The use of the trench-based source electrode instead of a larger gate electrode reduces the gate-to-drain capacitance (CGD) of the UMOSFET and improves switching speed by reducing the amount of gate charging and discharging current that is needed during high frequency operation.
Patent
Semiconductor devices exhibiting minimum on-resistance
TL;DR: In this article, an improved conductivity vertical channel semiconductor device includes an insulated gate electrode disposed adjacent a substantial portion of the voltage supporting region to reorient the electric field associated with those charges toward the gate electrode and transverse to the direction of current flow through the device.
Patent
Monolithically integrated trench mosfet and schottky diode
TL;DR: In this article, a monolithically integrated Schottky diode together with a high performance trenched gate MOSFET is used to enhance the reverse voltage capability of the diode.
Patent
Power LDMOS transistor
Shuming Xu,Jacek Korec +1 more
TL;DR: A laterally diffused metaloxide-semiconductor (LDMOS) transistor device includes a doped substrate having an epitaxial layer thereover having source and drain implant regions and body and lightly doped drain regions formed therein this paper.
Related Papers (5)
Power semiconductor devices and methods of manufacture
Ashok Challa,Alan Elbanhawy,Thomas E. Grebs,Nathan Kraft,Dean E. Probst,Rodney S. Ridley,Steven Sapp,Qi Wang,Chongman Yun,J.G. Lee,Peter H. Wilson,Joseph A. Yedinak,J.Y. Jung,Hocheol Jang,Babak S. Sani,Richard Stokes,Gary M. Dolny,John Mytych,Becky Losee,Adam Selsley,Robert Herrick,James J. Murphy,Gordon K. Madson,Bruce D. Marchant,Christopher L. Rexer,Christopher Boguslaw Kocon,Debra S. Woolsey +26 more