Temperature Associated Reliability Issues of Heterogeneous Gate Dielectric—Gate All Around—Tunnel FET

TLDR: In this article, the effect of interface trap charges such as positive interface charges and acceptor charges on the performance of heterogeneous gate dielectric-gate all around-tunnel FET (HD GAA TFET) has been investigated.

Abstract: In this paper, the temperature associated reliability issues of heterogeneous gate dielectric-gate all around-tunnel FET (HD GAA TFET) has been addressed, and the results are simultaneously compared with gate all around tunnel FET (GAA TFET). This is done by investigating the effect of interface trap charges such as donor (positive interface charges) and acceptor (negative interface charges) at various operating temperatures on the device analog parameters and RF figure of merits. It is observed that, at high gate bias, TFET exhibits weak temperature dependence owing to the weak dependence of band to band tunneling phenomenon on the temperature in comparison to the large temperature variation for lower gate bias due to the temperature dependence of Shockley-Read-Hall (SRH) phenomenon. Results reveal that extremely high off current at elevated temperatures degarades the device performance, making the device less reliable for high-temperature applications. Moreover, at elevated temperature, the decrease in threshold voltage and intrnsic delay, and increase in cut off frequency is found, thereby upgrading the device characteristics. All the simulations have been done on ATLAS device simulator.