Showing papers on "Electronic circuit simulation published in 2001"

Thermal component model for electrothermal analysis of IGBT module systems

Abstract: The insulated gate bipolar transistor (IGBT) modules are getting more accepted and increasingly used in power electronic systems as high power and high voltage switching components. However, IGBT technology with high speed and greater packaging density leads to higher power densities on the chips and increases higher operating temperatures. These operating temperatures in turn lead to an increase of the failure rate and a reduction of the reliability. In this paper, the static and dynamic thermal behavior of IGBT module system mounted on a water-cooled heat sink is analyzed. Although three-dimensional finite element method (3-D FEM) delivers very accurate results, its usage is limited by an imposed computation time in arbitrary load cycles. Therefore, an RC component model (RCCM) is investigated to extract thermal resistances and time constants for a thermal network. The uniqueness of the RCCM is an introduction of the time constants based on the Elmore delay, which represents the propagation delay of the heat flux through the physical geometry of each layer. The dynamic behavior predicted by the thermal network is equivalent to numerical solutions of the 3-D FEM. The RCCM quickly offers insight into the physical layers of the components and provides useful information in a few minutes for the arbitrary or periodic power waveforms. This approach enables a system designer to couple the thermal prediction with a circuit simulator to analyze the electrothermal behavior of IGBT module system, simultaneously.

Systematic development of transmission-line models for interconnects with frequency-dependent losses

Abstract: This paper presents a new method for the extraction of the frequency-dependent, per-unit-length (p.u.l.) resistance, and inductance parameters of multiconductor interconnects. The proposed extraction methodology is based on a new formulation of the magneto-quasi-static problem that allows lossy ground planes of finite thickness to be modeled rigorously. The formulation is such that the p.u.l. impedance matrix for the multiconductor interconnect is extracted directly at a prescribed frequency. Once the matrix has been calculated over the bandwidth of interest, rational function representations of its elements are generated through a robust matrix curve-fitting process. Such a formulation enables subsequent transient analysis of interconnects through a variety of approaches. Direct incorporation of the rational function model into a general-purpose circuit simulator and a standalone multiconductor-transmission-line simulator is demonstrated.

Circuit simulator models for the diode and IGBT with full temperature dependent features

Abstract: The problems faced in generating analytical models for the IGBT and power diode are devising correct equations and determining realistic boundary conditions, especially for 2D features, while ensuring convergence of the models. These issues are addressed in this paper in relation to the temperature dependent modelling of IGBTs and diodes.

Electronic circuit analysis and design

Abstract: This junior-level electronics text provides a foundation for analyzing and designing analog and digital electronic circuits. Computer analysis and design are recognized as significant factors in electronics throughout the book. The use of computer tools is presented carefully, alongside the important hand analysis and calculations. The author, Don Neamen, has many years experience as an enginering educator and an engineer. His experience shines through each chapter of the book, rich with realistic examples and practical rules of thumb.The book is divided into three parts. Part 1 covers semiconductor devices and basic circuit applications. Part 2 covers more advanced topics in analog electronics, and Part 3 considers digital electronic circuits.

Fast analysis and optimization of combline filters using FEM

Abstract: We analyze a combline filter using the Finite Element Method (FEM) with ports where the tuning screws would normally be. The filter is tuned with a circuit simulator using the multiport S-parameter data and lumped capacitors at the ports. We can then optimize the combline filter very rapidly by mapping the "coarse" circuit model to the "fine" FEM model. This optimization is shown to converge in one iteration, with a good starting point.

On the possibility to use SiC JFETs in Power Electronic circuits

Abstract: This article desccribes a proposed bridge circuit without anti-parallel diodes and results from preliminary computer simulations of the proposed circuit. There is a discussion of the normally-on pr ...

Electrical fast-transient test: conducted and radiated disturbance determination by a complete source modeling

Abstract: Tests against electrical fast transient/burst (EFT) represent a serious threat for modern high-speed electronics: besides the conducted injection of high amplitude pulse, a strong radiated field is produced during this test. The prediction of the effects of this test during the equipment early design stage requires the equivalent circuit of the generator: the output waveform into a resistive 50-/spl Omega/ load is not sufficient to recover the complete circuit, including inductive component and parasitic elements. These are essential to predict the disturbance produced in arbitrary loads, as the equipment under test can be viewed. This paper describes how to characterize the EFT generator by means of the measurement of the output voltage and current produced in presence of known loads; moreover, a procedure to calculate the current on the equipment power cord is shown, based on the use of a circuit simulator (PSPICE). Finally, the disturbance produced on different loads and the radiated field during the test are calculated and experimentally validated.

Hot Carrier Circuit Reliability Simulation

Abstract: The present invention is directed to a number of improvements in methods for reliability simulations in aged circuits whose operation has been degraded through hot-carrier or other effects. A plurality of different circuit stress times can be simulated within a single run. Different aging criteria may be used for different circuit blocks, circuit block types, devices, device models and device types. The user may specify the degradation of selected circuit blocks, circuit block types, devices, device models and device types independently of the simulation. Device degradation can be characterized in tables. Continuous degradation levels can be quantized. Techniques are also described for representing the aged device in the netlist as the fresh device augmented with a plurality of independent current sources connected between its terminals to mimic the effects of aging in the device. The use of device model cards with age parameters is also described. To further improve the circuit reliability simulation, a gradual or multi-step aging is used instead of the standard one step aging process. Many of these features can be embedded within the circuit simulator. A user data interface is also presented to implement these techniques and further allow users to enter their device models not presented in the simulator. For example, a proprietary model of, say, the substrate current in an NMOS could used be with a SPICE simulator employing a different model to simulate the aging of the circuit.

Time-domain simulation of mixed nonlinear magnetic and electronic systems

Abstract: This paper describes a technique for the simulation of complex magnetic systems intimately connected to any necessary drive electronics. The system is split into two Kirchhoffian domains, one magnetic and one electric. Two-way interaction between the domains is supported by a virtual device called a magnetoelectric differential gyrator. With this technique, arbitrarily complex, nonlinear, hysteretic magnetic systems may be simulated in the time domain, coupled to any appropriate nonlinear electronics, at a fraction of the cost of a comparable finite-element calculation. The capabilities of the system are demonstrated by the simulation of a feedback-controlled current-sensing system, and the simulation tracks the measured behavior of the system well outside its linear region, to the point that the nonlinear hysteretic core is being driven into and out of saturation, a consequence of a time delay inherent in the electronics. This is compared with a "conventional" electronic simulation of the same system, and the increased accuracy of this technique is clearly demonstrated.

State-variable-based transient circuit simulation using wavelets

Abstract: For the first time a state variable transient analysis using wavelets is developed and implemented in a circuit simulator. The formulation is particularly well suited to modeling RF and microwave circuits and is validated by considering a nonlinear transmission line. However, results indicate that still more research is needed to make this method efficient for the simulation of large circuits.

Model-order reduction of nonlinear MEMS devices through arclength-based Karhunen-Loeve decomposition

Abstract: The integration of micro-mechanical structures with electronics has increased the demand for new CAD tools to support. Of the key importance for developing such CAD tools is the development of fast and accurate reduced models for coupled-domain nonlinear micro-electro-mechanical (MEM) devices. To overcome the shortcomings of conventional finite element based direct numerical dynamic models, a new technique for automatically generating reduced-order dynamic models for nonlinear MEM devices will be presented together with simulation results. The reduced models can greatly reduce the simulation time and be easily connected to a circuit simulator for complete system-level simulations.

System and method for determining the required decoupling capacitors for a power distribution system using an improved capacitor model

Abstract: A system and method for determining the required decoupling capacitors for a power distribution system using an improved capacitor model. In one embodiment, a method for determining the decoupling capacitors for a power distribution system includes creating a model of the power distribution system using circuit simulation software, such as SPICE. The power distribution system model includes a plurality of cells interconnected at predetermined nodes. The method then selects one or more decoupling capacitors for the power distribution system. The decoupling capacitors are represented in the power distribution system model by a capacitor model, which is a mathematical model of an electrical circuit. The electrical circuit upon which the capacitor model is based is a ladder circuit. Following the selecting of the decoupling capacitors, the power distribution system model is update based on the selections, and operation of the power distribution system is then simulated. During the simulation, transfer impedance values are determined for each of the nodes, and compared to target impedance. The method is then repeated until each of the transfer impedance values is at or below the target impedance.

Method for controlling critical circuits in the design of integrated circuits

Abstract: A method of providing critical circuits in a library of circuits, whereby such critical circuits allows designers to apply modifications to them in a controlled manner such that the changes are easy to implement and virtually guaranteed to be correct. The invention comprises a method of performing limited modifications to such critical circuits to alter its characteristics in a controlled manner, and thereafter checking the resulting modified circuit with a circuit simulator for conformance to predetermined specifications that have been assembled for this library critical circuit.

Efficient and accurate crosstalk prediction via neural net-based topological decomposition of 3-D interconnect

Abstract: Crosstalk-related issues have become increasingly important with deep submicron downscaling of ICs and wafer scale integration. In today's systems-on-a-chip, the delay through a wire is often greater than the delay through the gate driving it. Furthermore, because of significant parasitic effects, crosstalk between signals on wires can cause major problems. Improved management of the EMI problem is made possible via EDA tools which have the capability of accurately and efficiently modeling electromagnetic interference effects in nanoscale VLSI. However, existing tools are computationally expensive and do not have broad application. The novel methodology proposed in this paper involves topological decomposition of small portions of interconnect (referred to as wirecells) at an extreme level of detail and the creation of parameterized models of these primitive interconnect structures using modular artificial neural networks (MANNs). The technique uses a finite element method program coupled with a circuit simulator and a neural network multi-paradigm prototyping system to produce a library of standard MANN-based wirecell models. It is especially attractive because none of the existing approaches is capable of fully modeling the simultaneous effect on delay and crosstalk of several uncorrelated variables such as interconnect length, width, thickness, separation, metal and insulating medium conductivity and relative permittivity for multiple systems of conductors. The library models derived are used to predict delay noise and crosstalk resulting from interconnect structures embedded in actual analog and digital circuitry.

Behavioral modeling of digital IC input and output ports

Abstract: This paper addresses the development of accurate and efficient behavioral models of digital integrated circuit input and output ports for signal integrity simulations and timing analyses. The modeling process is described and applied to the characterization of actual devices.

A behavioural opto-electro-thermal VCSEL model for simulation of optical links

Abstract: In this paper, we present an efficient behavioural model for vertical-cavity surface-emitting lasers (VCSELs). Based on the rate equations and the thermal conduction equation, this model allows the calculation of the electrical, optical and thermal interactions. Furthermore, physical temperature-dependent effects such as gain and wavelength variations, Auger recombination and threshold current variations have been implemented. The VCSEL model, written in VHDL-AMS, can be associated with circuit-level models or macromodels already available for electronic components to enable the simulation of an entire communication link in a standard circuit simulator environment. It thus allows the simulation of high transmission rate on-chip and chip-to-chip optical interconnect systems.

Defect-oriented testing of Josephson logic circuits and systems

Abstract: In this paper, defect-oriented testing of low temperature superconducting Josephson logic systems is used as a basis for structural test generation. This requires the investigation of processing defects using defect monitors and the development of fault models. Inductive fault analysis techniques play an important role in this approach. By means of fault injection in the JSIM circuit simulator, the most effective test signals can be derived which can subsequently be used for test-generator hardware in a built-in self test environment.

PECS-an efficient solution for simulating switched networks with nonlinear elements

Abstract: PECS (Power Electronics Circuit Simulator) enables the time-domain simulation of switched networks that may contain nonlinear elements. Focus has been placed not only on obtaining high speed, but also on achieving a very high degree of accuracy. A set of optimized computer algorithms that have been incorporated into PECS to achieve these objectives are explained. Examples run, which include a power-factor correction circuit containing a multiplier/divider element, have shown over an order of magnitude speed advantage over other leading approaches.

Extending Spice-like analog simulator with a time-domain full-wave field solver

Abstract: In this paper an analog circuit simulator is integrated with a versatile full-wave finite-difference time-domain (FDTD) electromagnetic (EM) solution module. The circuit-field co-simulation method is introduced to connect a Spice-like circuit simulator with an FDTD solver for simulating hybrid high-speed systems. The interface that links both simulators is derived directly from the Maxwell's equations and is simple to implement. Results from example circuits show that the proposed technique is highly accurate and stable and is suitable for integrating with any existing analog simulators, enhancing their capabilities in high-frequency circuit and packaging analysis where field effects cannot be ignored.

Efficient generation of pre-silicon MOS model parameters for early circuit design

Abstract: The technology development cycle continues to shrink, which very often requires evaluation of circuit design and technology choices using circuit simulators at the time when no real silicon is available. In this paper, we present an efficient methodology for generating pre-silicon device models for advanced CMOS processes. The methodology allows accurate prediction of the full MOS I-V characteristics for the future technologies combining a constraint backpropagation algorithm based upon a few critical specifications, physical models for the advanced device phenomena, and the empirical data from devices of an existing technology. The methodology has been tested on two CMOS production technologies. Good prediction results are achieved: for nMOS the rms error is 1%-2%, for pMOS it is 2%-4%.

Spice Thermal Subcircuit of Multifinger HBT derived from Ritz Vector reduction technique of 3D Thermal Simulation for electrothermal modeling

Abstract: This paper deals with the integration of a reduced thermal model based on tree dimensional Finite Element (FE) thermal simulation into circuit simulator for accurate prediction of electrothermal behavior of power devices The reduced thermal model based on the Ritz vectors approach is easily usable in any kind of circuit simulator because it is described by a spice format subcircuit The model has been successfully experimented with the ADS simulator Electrical based thermal measurements of transient temperature response have successfully validated our approach

Electrical Circuit Analysis of Coplanar Plasma Display Panels Using a Simple Discharge Model.

Abstract: We have developed a simple method of modeling the electrical characteristics of a plasma display panel discharge. We analyze the discharge phenomena of coplanar plasma display panels (PDPs), and the model is sufficiently simple to express the electrical characteristics of the phenomena. Being a combination of primitive electric elements, this model can be calculated using a general-purpose circuit simulator, which enables us to simulate the PDP electrical characteristics easily and promptly. This model can quantitatively predict the discharge current waveform, and its dependence on the power supply condition and electrode geometry within the range of practical conditions. We can state that this model is a very useful tool for the analysis and design of PDP apparatus.

Method and system for screening a VLSI design for inductive coupling noise

Abstract: A method is disclosed for estimating inductive coupling noise of a signal on a transmission line in a circuit design stored in a computer memory. The method determines the capacitive coupling noise on the signal, adds inductive coupling noise, and compares the total to a specified maximum amount of noise. The inductive coupling is a percentage of a supply voltage, which percentage varies depending upon the transition rate of the signal, the resistance of the line, and the gate capacitance of a load on the line. The inductive coupling varies based on the circuit design and may be stored in a table having inductive coupling values for multiple design conditions. The table is created using a field solver to determine line characteristics and a circuit simulator to simulate inductive coupling noise. For each set of initial conditions, a worst-case inductive coupling value is recorded in the table.

Multiparameter time-domain sensitivity computation

Abstract: In this paper, a novel approach for the computation of multiparameter time-domain sensitivity during circuit simulation is presented. The computation of the sensitivity values of one or more circuit variables (e.g., node voltages or branch currents) with respect to both design parameters (e.g., R, C, MOS length, MOS width...) and process parameters (e.g., tox, nsub, u0...) is addressed by introducing a rigorous mathematical derivation of the proposed direct differentiation modified algorithm (DDMA). First, the circuit interpretation of the analytical formulas as well as their theoretical derivation from the Tellegen's theorem is discussed. Then, DDMA is compared with the direct method and the adjoint technique to emphasize the cost difference in terms of CPU operations. The accuracy of the new algorithm is also evaluated, by estimating the numerical error involved in the solution of discretized sensitivity equations. Finally, a set of circuit examples is presented to demonstrate the effectiveness of DDMA together with the implementation details needed to include the present sensitivity analysis in a circuit simulator such as Spice3F5.

A time-domain circuit simulator for coupled-cavity traveling-wave tubes

Abstract: The Curnow equivalent circuit was used to predict the dispersion of cold coupled-cavity traveling-wave tubes, as wen as the voltage and current characteristics for lossless and lossy multicavity circuits. The equivalent circuit is extended to have three ports. The added beam port allows the future modeling of the interaction between beam and cavity. Losses are introduced into the circuit as resistors in series with the corresponding inductors. The time-domain solution to the multicavity circuit is developed. It can be applied to the full-spectrum signal. It is also useful for the transient analysis for both single frequency and full-spectrum signals, including the turn-on transients. Numerical methods to solve the time-domain equations are discussed; a second-order leap-frog method and a fourth-order Runge-Kutta method are implemented and analyzed. Simulation results from both codes are compared, and match well with the theory.

CHORAL — A One Step Method as Numerical Low Pass Filter in Electrical Network Analysis

Abstract: Circuit simulation packages generate the network equations automatically. In time domain analysis this results in a system of differential-algebraic equations, which is solved numerically by BDF schemes and/or the trapezoidal rule. CHORAL, a charge-oriented Rosenbrock-Wanner method, has been developed as an alternative approach for digital circuits. By its successful implementation into TITAN, Infineon Technologies’ circuit simulator, a second integration scheme is available for the first time. Results for benchmarks and industrial circuits show that CHORAL is competitive with the standard ansatz. A careful analysis shows that CHORAL can be interpreted as a numerical (non-ideal) low pass filter with all its beneficial properties: oscillations of physical significance are preserved, but highly oscillatory perturbations are damped out very rapidly.

Distributed B-spline electrothermal models of thyristors proposed for circuit simulation of power electronics

Abstract: A B-spline based electrothermal model for thyristors is proposed for circuit simulations and is demonstrated for gate-triggered resistive circuits by comparison with PISCES simulation results. The model topology for small area thyristors consists of an electrical device circuit model and a thermal circuit model which are coupled together to establish the interaction between the electrical and thermal responses. A distributed topology is introduced for large area thyristors to simulate the realistic electrothermal spreading effect. Each element of the electrothermal topology is extracted from the DC current-voltage (I-V), quasistatic capacitance-voltage (C-V), and static and transient thermal characteristics simulated with PISCES. The fitting technique relies on B-spline and Tensor Product B-Spline (TPS) numerical methods, as well as, physical-based analytic expressions. This B-spline based electrothermal model is implemented in the SPICE-compatible MISIM circuit simulator. Simulations are performed to obtain the device electrothermal distribution, verify the model accuracy, and demonstrate the device self heating effect for 600 Hz gate-triggered resistive circuits. Excellent agreements are obtained for the DC I-V, transient AC, and electrothermal simulation results between the new circuit model and the PISCES/GIGA simulator for the low-frequency applications considered.

A new physics-based circuit model for 4H-SiC power diodes implemented in SABER

Abstract: A circuit-oriented model for 4H-SiC power diodes is presented. The modeling technique used in this work was previously applied to a silicon (Si) power diode model for both turn-on and turn-off transients, and presents a good trade-off between accuracy and speed. The model is physics-based, but includes judicious approximations for fast calculation, and includes up-to-date physical models for silicon carbide, with temperature dependence. The proposed model is practically implemented in the circuit simulator SABER, using the MAST modeling language. Model performances are compared to measurements on 2.5 kV 400 A Si IGBT/SiC diode modules from ABB at various input currents.

Power analyzing system for integrated circuit device

Abstract: PROBLEM TO BE SOLVED: To provide the power analyzing system of an integrated circuit device capable of much easily and precisely executing power analysis even in a large- scale integrated circuit device whose integration is progressive, or in an upstream design process whose abstraction property is high. SOLUTION: A text pattern generating device 11 acquires a test pattern with pattern length based on an index value by automatic test pattern generation (ATPG) based on a net list 21 of an LSI, and extracts only a part related with a circuit function operation, and outputs it as a test pattern 18 for power analysis. A circuit simulator 12 inputs the outputted test pattern 18 for power analysis and timing information 23 differently prepared in order to operate the pattern, and calculates circuit information 24 and signal toggle information 25 for each cluster by using a combinatorial circuit as a unit, and executes circuit simulation by using the calculated results. Moreover, time-sequential power value for each cluster is analyzed, and the power analysis of the whole circuit is executed.