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Showing papers on "Junction temperature published in 2013"


Journal ArticleDOI
TL;DR: In this paper, the authors proposed to use infrared (IR) measurements in order to evaluate the relevance of three commonly used TSEPs with insulated gate bipolar transistor chips: the saturation voltage under low current, the gate-emitter voltage, and the saturation current.
Abstract: The measurement of the junction temperature with thermosensitive electrical parameters (TSEPs) is largely used by electrical engineers or researchers, but the obtained temperature value is generally not verified by any referential information of the actual chip temperature distribution. In this paper, we propose to use infrared (IR) measurements in order to evaluate the relevance of three commonly used TSEPs with insulated gate bipolar transistor chips: the saturation voltage under a low current, the gate-emitter voltage, and the saturation current. TheIR measurements are presented in detail with an estimation of the emissivity of the black paint deposited on the power module. The temperatures obtained with IR measurements and with the different TSEPs are then compared in two cases: the use of only one chip and the use of two paralleled chips.

164 citations


Journal ArticleDOI
TL;DR: In this paper, a fully integrated silicon carbide (SiC)-based six-pack power module is designed and developed for electric vehicle and hybrid electric vehicle applications, where each switching element is composed of four paralleled SiC junction gate field effect transistors (JFETs) with two antiparallel SiC Schottky barrier diodes.
Abstract: In this paper, a fully integrated silicon carbide (SiC)-based six-pack power module is designed and developed. With 1200-V, 100-A module rating, each switching element is composed of four paralleled SiC junction gate field-effect transistors (JFETs) with two antiparallel SiC Schottky barrier diodes. The stability of the module assembly processes is confirmed with 1000 cycles of -40°C to +200°C thermal shock tests with 1.3°C/s temperature change. The static characteristics of the module are evaluated and the results show 55 mΩ on-state resistance of the phase leg at 200°C junction temperature. For switching performances, the experiments demonstrate that while utilizing a 650-V voltage and 60-A current, the module switching loss decreases as the junction temperature increases up to 150°C. The test setup over a large temperature range is also described. Meanwhile, the shoot-through influenced by the SiC JFET internal capacitance as well as package parasitic inductances are discussed. Additionally, a liquid cooled three-phase inverter with 22.9 cm × 22.4 cm × 7.1 cm volume and 3.53-kg weight, based on this power module, is designed and developed for electric vehicle and hybrid electric vehicle applications. A conversion efficiency of 98.5% is achieved at 10 kHz switching frequency at 5 kW output power. The inverter is evaluated with coolant temperature up to 95°C successfully.

137 citations


Journal ArticleDOI
TL;DR: In this paper, the thermal and hydrodynamic performance of liquid active cooling devices was investigated for possible applications in the thermal management of high-power LED arrays fabricated on InGaN/sapphire chips.

72 citations


Proceedings ArticleDOI
17 Oct 2013
TL;DR: In this article, the Miller plateau width (in the Vge waveform) depend linearly on the junction temperature of the IGBT chips, and a measurement circuit was implemented at gate level to measure the involved time duration and its functionality was demonstrated for different types of IGBT modules.
Abstract: The paper presents a novel method for online estimation of the junction temperature (Tj) of semiconductor chips in IGBT modules, based on evaluating the gate-emitter voltage (Vge) during the IGBT switch off process. It is shown that the Miller plateau width (in the Vge waveform) depend linearly on the junction temperature of the IGBT chips. Hence, a method can be proposed for estimating the junction temperature even during converter operation - without the need of additional thermal sensors or complex Rth network models. A measurement circuit was implemented at gate level to measure the involved time duration and its functionality was demonstrated for different types of IGBT modules.

61 citations


Journal ArticleDOI
TL;DR: In this article, the impact of increased junction temperature on a traction drive converter loss and thermal management is analyzed, and it is shown that by extending the device junction temperature to 200°C, the additional 65°C coolant loop can be eliminated without compromising power density and thermal design.
Abstract: In order to satisfy the high-density requirement and harsh thermal conditions while reducing cost in future electric and hybrid electric vehicles (HEV), a systematic study of a 1200-V trench-gate field-stop Si insulated gate bipolar transistor (IGBT) operating up to 200°C is performed to determine its feasibility, issues, and application guideline. The device forward conduction characteristics, leakage current, and switching performance are evaluated at various temperatures. Based on the device characterization, the impact of the increased junction temperature on a traction drive converter loss and thermal management is analyzed. It is shown that by extending the device junction temperature to 200°C, the additional 65°C coolant loop can be eliminated without compromising power density and thermal management design. Furthermore, the possible failure mechanisms including latching, short circuit fault, and avalanche capability are tested at elevated temperatures. The criteria considering thermal stability, thermal management, short circuit capability, and avalanche capability are given at 200°C to ensure the safe and reliable operation of Si IGBTs.

54 citations


Proceedings ArticleDOI
01 Nov 2013
TL;DR: An overview of literature where the usage of TSEPs has been hypothesised or realised in realistic power electronic converter setups is provided and their potential use in the aforementioned goals in condition monitoring and active thermal control is described.
Abstract: The temperature of a power semiconductor device is important for both its optimal operation and reliability. If the temperature is known during the operation of a converter, it can be used to monitor the health of power modules: a measurement of aging, scheduling of maintenance, or even implementation of active thermal control to reduce losses and increase lifetime can be performed given an accurate knowledge of temperature. Temperature measurements via thermo-sensitive electrical parameters (TSEP) are one way to carry out immediate temperature readings on fully packaged devices. However, successful implementation of these techniques during the actual operation of a device has not yet been achieved. This paper provides an overview of literature where the usage of TSEPs has been hypothesised or realised in realistic power electronic converter setups. Barriers and limitations preventing wider scale implementation of these methods are discussed. Their potential use in the aforementioned goals in condition monitoring and active thermal control is also described.

47 citations


Journal ArticleDOI
TL;DR: In this article, thermal characteristics of the I -V curve of GaN-based white light-emitting diodes (LEDs), focused on the variations of the dynamic resistance, were investigated.
Abstract: This paper deals with the thermal characteristics of the I -V curve of GaN-based white light-emitting diodes (LEDs), focused on the variations of the dynamic resistance The final goal of this study is to improve the static and dynamic operations of the LED driver within a wide range of temperatures Four LEDs from different manufacturers were chosen for this study The first part of this paper shows the thermal characterization of the forward voltage at a given injected current After that, the experimental data are fitted in order to calculate the junction temperature accurately Then, a small-signal analysis where the LEDs are supplied with dc current and an ac perturbation superimposed at the operation point under variable junction temperature is covered This analysis allows the dynamic resistance to be experimentally determined for a wide junction temperature range Furthermore, the experimental data have been fitted in order to establish the relationship between junction temperature and dynamic-resistance variation, so the dynamic resistance can be determined for a given operation point Finally, an illustrative example is presented as a case study in order to analyze the implications of the dynamic resistance on the output-current ripple and on the closed-loop operation of a LED driver The experimental results confirm that the junction temperature shift induces a variation in the dynamic resistance, which might have a significant effect on the output-current ripple and closed-loop performance in certain LED fixtures

46 citations


Journal ArticleDOI
TL;DR: The reliability models of both parallel and standby configurations are developed based on the Markov process and it is demonstrated that there is a boundary condition in which both configurations have the same MTTF.
Abstract: Parallel and standby configurations can be applied to semiconductor switches to improve the reliability of power electronic converters in mission-critical applications. In this paper, the reliability models of both configurations are developed based on the Markov process. The mean time to failure (MTTF) of each configuration is derived in terms of the underlying parameters. It is demonstrated that there is a boundary condition in which both configurations have the same MTTF. This boundary condition is expressed in terms of the junction temperature of the semiconductor switch in the steady state. The temperature range in which the parallel configuration is more reliable is formulated for different types of power semiconductor switches including MOSFETs, bipolar junction transistors, SCRs, triacs, regular diodes, and Schottky diodes. Case studies are presented to determine the more reliable configuration for a laboratory-scale buck converter.

45 citations


Patent
11 Jan 2013
TL;DR: In this article, a system and method for monitoring in real time the operating state of an IGBT device, to determine a junction temperature and/or the remaining lifetime of a IGBT, is presented.
Abstract: A system and method are provided for monitoring in real time the operating state of an IGBT device, to determine a junction temperature and/or the remaining lifetime of an IGBT device. The system includes a differential unit configured to receive a gate-emitter voltage characteristic of the IGBT device to be measured and to differentiate the gate-emitter voltage characteristic to obtain pulses correlating with edges formed by a Miller plateau phase during a switch-off phase of the IGBT device. The system also includes a timer unit configured to measure the time delay between the obtained pulses indicating the start and end of the Miller plateau phase during the switch-off phase of the IGBT device, and a junction temperature calculation unit configured to determine at least one of the junction temperature of the IGBT device and/or the remaining lifetime of the IGBT device based on the measured time delay.

44 citations


Journal ArticleDOI
TL;DR: In this paper, a TSV-compatible micropin-fin heat sink (MPFHS) with a height of 200 μm, a diameter of 150 μm and a pitch of 225 μm is fabricated.
Abstract: Microfluidic cooling is proposed as a solution to reject heat from a 3-D IC stack of high power chips. However, the integration of interlayer microfluidic cooling in 3-D ICs inevitably increases wafer thickness and thus presents possible challenges for through-silicon via (TSV) integration. This paper discusses the thermal and electrical co-design of a microfluidic heat sink compatible with TSV technology. A TSV-compatible micropin-fin heat sink (MPFHS) with a height of 200 μm, a micropin-fin diameter of 150 μm, and a pitch of 225 μm is fabricated. The fabricated MPFHS is experimentally shown to maintain the chip junction temperature at a power density for a flow rate of 70 mL/min. The thermal results are benchmarked with an air-cooled heat sink and a chip junction temperature reduction of is observed. A 3 × 3 array of TSVs, each with a diameter of 10 μm and a height of 178 μm (18:1 aspect ratio), is integrated into each micropin-fin. This results in a TSV density of 17424 cm-2 in the microfluidic heat sinks. Using four-point probing, the measured resistance of TSVs is 36.5±1.5 mΩ.

43 citations


Journal ArticleDOI
TL;DR: In this article, the authors present the development and experimental performance of a 10-W, all-silicon carbide (SiC), 250 °C junction temperature, high power density, three-phase ac-dc-ac converter.
Abstract: This article presents the development and experimental performance of a 10-W, all-silicon carbide (SiC), 250 °C junction temperature, high-powerdensity, three-phase ac-dc-ac converter. The electromagnetic interference filter, thermal system, high-temperature package, and gate drive design are discussed in detail. Tests confirming the feasibility and validating the theoretical basis of the prototype converter system are described. Over the last 20 years, advances in industrial and research efforts in electronic power conversion have steadily been moving toward higher power densities, which has resulted in improvements in converter system performance; reductions in physical size; and reductions in mass, weight, and cost. However, this pushes the limits of the existing control, packaging, and thermal management technology for power converter systems.

Proceedings ArticleDOI
14 Apr 2013
TL;DR: In this article, a 2-stage acceleration theory for luminous flux depreciation testing at LED lamp/luminaire level is developed to reduce the test time from 6,000 hours to less than 2, 000 hours.
Abstract: A 2-stage acceleration theory for luminous flux depreciation testing at LED lamp/luminaire level is developed to reduce the test time from 6,000 hours to less than 2,000 hours. Such an acceleration theory is based on the exponential decay model and Arrhenius acceleration equation. Three key parameters, namely, activation energy, operating junction temperature, and accelerated testing junction temperature are obtained from massive proven LM80 data sets, nominal junction design temperature, and maximum allowed ambient temperature in operating conditions. A “master curve” that describes the minimum requirement of the luminous decay is defined, and the curve is associated with a certain design junction temperature. Such a design junction temperature matches the maximum junction temperature where LM80 data are enveloped in the master curve. The corresponding acceleration test procedures have been established by considering the currently available measurement capabilities. Considerable amount of representative lamp/luminaire samples, which directly came from market, have been tested to validate the theory. The results show that the proposed accelerated lifetime test is equivalent to the current 6000h test. In addition, the newly developed accelerated test can eliminate those products with either poor LED sources, or poor system thermal design, or poor electronics system (including driver system) that cannot sustain sufficient temperature storage period.

Proceedings ArticleDOI
28 Oct 2013
TL;DR: In this paper, a thermal network with temperature dependent thermal conductivities and heat capacitances is used to calculate the junction temperature of IGBT in a device model realized in Simulink.
Abstract: A RC thermal network with temperature dependent thermal conductivities and heat capacitances is used to calculate the junction temperature of IGBT in a device model realized in Simulink. The collector current, IC, collector-emitter voltage, VCE, and the case temperature, TC, measured during the cycling, are used as input parameters of the Simulink model. The model is compared with a constant thermal conductivity and heat capacitance model (RC network) and verified experimentally using a thermo-sensitive electrical parameter method. Including the temperature dependent parameters results in an improvement of accuracy for determining the junction temperature compare to the model with constant thermal conductivity and heat capacitance.

Proceedings ArticleDOI
28 May 2013
TL;DR: In this article, the authors compared the thermal performance of glass and silicon interposers for mobile applications, using computational modeling, and showed that glass interposer provides significantly better thermal isolation between logic and memory chips.
Abstract: This paper compares thermal performance of glass and silicon interposers for mobile applications, using computational modeling. It is well known that while silicon is a good thermal conductor, glass is a poor conductor, potentially making it unsuitable for packaging applications. This study proposes to address this short coming of glass by comparing and contrasting with silicon. In this study, for more accurate thermal analysis, effective thermal conductivity of glass interposer substrates is measured by infrared microscopy. Subsequently, equivalent thermal conductivity of TPV (Through Package Via) is calculated through numerical analyses. For comparison of thermal performance of glass and silicon interposers, 2.5D interposer structures with logic and memory chips are considered. The comparison shows that by incorporating thermal vias, junction temperature for the glass interposer decreases by about 60%, while junction temperature for silicon interposer decreases 45%, making both acceptable. However, the glass interposer provides significantly better thermal isolation between logic and memory chips. Glass and silicon interposer structures placed in enclosures, representative of mobile applications, provide comparable performance in the presence of thermal vias.

Journal ArticleDOI
TL;DR: In this paper, a Si insulated-gate bipolar transistor (IGBT) phase-leg module is developed for operating at 200°C in hybrid electric vehicle applications utilizing the high temperature packaging technologies and appropriate thermal management.
Abstract: A Si insulated-gate bipolar transistor (IGBT) phase-leg module is developed for operating at 200°C in hybrid electric vehicle applications utilizing the high temperature packaging technologies and appropriate thermal management. The static and switching electrical characteristics of the fabricated power module are tested at various temperatures, showing that the module can operate reliably with increased but acceptable losses at 200°C. The criterion on thermal performance is given to prevent thermal runaway caused by fast increase of the leakage current during a high temperature operation. Afterward, the thermal management system is designed to meet the criterion, the performance of which is evaluated with experiment. Furthermore, two temperature-sensitive electrical parameters, on-state voltage drop and the switching time, are employed for thermal impedance characterization and the junction temperature measurement during converter operation, respectively. Finally, a 10-kW buck converter prototype composed of the module assembly is built and operated at the junction temperature up to 200°C. The experimental results demonstrate the feasibility of operating Si device-based converters continuously at 200°C.

Proceedings ArticleDOI
01 Oct 2013
TL;DR: The first 600-V GaN-on-Si switching transistors have passed qualification based on the Jedec standards and entered commercial market as mentioned in this paper, and they exhibit properties superior to matured Si counterparts including lower on-resistance, much reduced input/output charges, and much higher switching speed.
Abstract: Industry's first 600-V GaN-on-Si switching transistors have passed qualification based on Jedec standards and entered commercial market. Although far from being optimized, these 1st generation GaN devices exhibit properties superior to matured Si counterparts including lower on-resistance, much reduced input/output charges, and much higher switching speed. Application examples show significant loss reduction at high frequencies and markedly simplified hard-switched bridge circuits, offering a new means for designing more compact and efficient power systems. Extended SOA tests revealed a large margin in blocking voltage even at 175 °C, ability to deliver 99% peak efficiency at 187°C case temperature and high power operation at 215°C junction temperature with a very-low degradation rate.

Proceedings ArticleDOI
17 Oct 2013
TL;DR: In this article, the influence of the absolute junction temperature Tj* on IGBT power module lifetime was systematically investigated by means of active power cycling tests, and the impact on the wire bond lift-off and the chip solder degradation mechanism could be determined separately by applying the concept of separating failure modes.
Abstract: The influence of the absolute junction temperature Tj* on IGBT power module lifetime was systematically investigated by means of active power cycling tests. Both the impact on the wire bond lift-off and the chip solder degradation mechanism could be determined separately by applying the concept of separating failure modes. The test results not only prove that classical lifetime models overestimate the influence of Tj*, but also show that the two dominant failure mechanisms have to be treated differently. The wire bond lift-off failure mode is weakly affected by the absolute temperature level and possesses a very small activation energy of 0.069 eV. The solder degradation mode exhibits a significantly larger activation energy of 0.159 eV, which results in a massive decrease (factor 3) in power cycling capability when increasing Tj* by 85 K. For junction temperatures above 175°C SnAg-based solder joints are no longer suitable for reliable power module designs and advanced die attach technologies such as silver sintering have to be deployed. For the description of such advanced power modules specific lifetime curves are under development which exclusively represent the pure wire bond lifetime, as for common power cycling conditions the silver sintered die attach is not subjected to ageing.

Journal ArticleDOI
TL;DR: In this article, the effect of junction temperature between 300 and 550 K on the large-signal characteristics of the device for both continuous wave (CW) and pulsed modes of operation was studied.
Abstract: The authors have developed a large-signal simulation technique extending an in-house small-signal simulation code for analyzing a 94 GHz double-drift region impact avalanche transit time device based on silicon with a non-sinusoidal voltage excitation and studied the effect of junction temperature between 300 and 550 K on the large-signal characteristics of the device for both continuous wave (CW) and pulsed modes of operation. Results show that the large-signal RF power output of the device in both CW and pulsed modes increases with the increase of voltage modulation factor up to 60%, but decreases sharply with further increase of voltage modulation factor for a particular junction temperature; while the same parameter increases with the increase of junction temperature for a particular voltage modulation factor. Heat sinks made of copper and type-IIA diamond are designed to carry out the steady-state and transient thermal analysis of the device operating in CW and pulsed modes respectively. Authors have adopted Olson's method to carry out the transient analysis of the device, which clearly establishes the superiority of type-IIA diamond over copper as the heat sink material of the device from the standpoint of the undesirable effect of frequency chirping due to thermal transients in the pulsed mode.

Proceedings ArticleDOI
17 Oct 2013
TL;DR: In this article, the authors proposed a novel Electro-Thermal Model for the new generation of power electronics WBG-devices (by considering the SiC MOSFET-CMF20120D from CREE), which is able to estimate the device junction and case temperature.
Abstract: This paper propose a novel Electro-Thermal Model for the new generation of power electronics WBG-devices (by considering the SiC MOSFET-CMF20120D from CREE), which is able to estimate the device junction and case temperature. The Device-Model estimates the voltage drop and the switching energies by considering the device current, the off-state blocking voltage and junction temperature variation. Moreover, the proposed Thermal-Model is able to consider the thermal coupling within the MOSFET and its freewheeling diode, integrated into the same package, and the influence of the ambient temperature variation. The importance of temperature loop feedback in the estimation accuracy of device junction and case temperature is studied. Furthermore, the Safe Operating Area (SOA) of the SiC MOSFET is determined for 2L-VSI applications which are using sinusoidal PWM. Thus, by considering the heatsink thermal impedance, the switching frequency and the ambient temperature, the maximum allowed drain current is determined according to the thermal limitations of the device. Finally, dynamic study of MOSFET junction and case temperature is also performed by considering the variation of the ambient temperature and of the load current.

Journal ArticleDOI
TL;DR: In this paper, gate leakage current due to impact ionization can interfere with dc gate metal resistance thermometry (GMRT) measurements, and it is demonstrated that this can be largely avoided by instead applying an ac version of GMRT.
Abstract: Gate junction temperature is presented as the crucial parameter for modeling thermal degradation in GaAs device reliability studies, and sufficient for modeling the impact of temperature on device terminal characteristics. Gate metal resistance thermometry (GMRT) is applied to a GaAs pseudomorphic high-electron mobility transistor to measure its gate junction temperature. It is found that gate leakage current due to impact ionization can interfere with dc GMRT measurements. To the best of our knowledge, for the first time it is demonstrated that this can be largely avoided by instead applying an ac version of GMRT. However, the dynamic resistance of the gate leakage current path can interfere with ac GMRT. Measurements and thermal finite element method simulations of devices at constant power dissipation conclude that the bias dependence of the channel heat source profile affects the gate junction temperature. A parameter extraction technique is presented and used in device lifetime calculations to demonstrate MTTF variations of more than an order of magnitude (despite fixed power) due to bias-dependent self-heating.

Journal ArticleDOI
Biqing Wu1, Si-Qi Lin1, Tien-Mo Shih1, Yulin Gao1, Yijun Lu1, Lihong Zhu1, Chen Guolong1, Zhong Chen1 
TL;DR: In this paper, a method for determining the junction temperature (Tj) of LED in terms of the relationship between the diode reverse current (IR) and Tj is presented.
Abstract: A method is presented in this study to determine the junction temperature (Tj) of LED in terms of the relationship between the diode reverse current (IR) and Tj A theoretical model for the dependence of IR on Tj is derived on the basis of the Shockley equation and is validated by our experimental results The method is compared with the conventional forward voltage method, and its advantages have been identified

Journal ArticleDOI
03 Jun 2013
TL;DR: In this article, a discretized proportional base driver is proposed which will reduce, for the right application, the steady-state power consumption of the base driver, and the operation of the proposed base driver has been verified experimentally, driving a 1200-V/40-A SiC BJT in a dc-dc boost converter.
Abstract: Silicon carbide (SiC) bipolar junction transistors (BJTs) require a continuous base current in the on-state. This base current is usually made constant and is corresponding to the maximum collector current and maximum junction temperature that is foreseen in a certain application. In this paper, a discretized proportional base driver is proposed which will reduce, for the right application, the steady-state power consumption of the base driver. The operation of the proposed base driver has been verified experimentally, driving a 1200-V/40-A SiC BJT in a dc-dc boost converter. In order to determine the potential reduction of the power consumption of the base driver, a case with a dc-dc converter in an ideal electric vehicle driving the new European drive cycle has been investigated. It is found that the steady-state power consumption of the base driver can be reduced by approximately 60%. The total reduction of the driver consumption is 3459 J during the drive cycle, which is slightly more than the total on-state losses for the SiC BJTs used in the converter.

Patent
24 Jul 2013
TL;DR: In this article, a radiation heat dissipation coating for reducing the light-emitting diode (LED) chip junction temperature and a preparation method thereof was disclosed, which comprises the following components in percentage by weight: 30-70% of macromolecular resin, 5-40% of solvent, 10-30% of far infrared ceramic powder, 5 -20% of silicon carbide, 0.5-3% of cerium oxide and 1-5% of addition agent.
Abstract: The invention discloses a radiation heat dissipation coating for reducing the light-emitting diode (LED) chip junction temperature and a preparation method thereof. The coating comprise the following components in percentage by weight: 30-70% of macromolecular resin, 5-40% of solvent, 10-30% of far infrared ceramic powder, 5-20% of silicon carbide, 0.5-3% of cerium oxide and 1-5% of addition agent. By utilizing the radiation heat dissipation coating disclosed by the invention, the LED chip junction temperature can be greatly lowered, and the service life of an LED chip in a lamp can be prolonged.

Proceedings ArticleDOI
28 Oct 2013
TL;DR: In this paper, a gate drive-RDS-on-L-C resonant model is implemented to demonstrate the mechanism of power MOSFET turn-on dynamics.
Abstract: Junction temperature sensing requirements for fast MOSFET junction temperature control and high power fast switching power converter protection are not easily met with non-intrusive techniques. This paper presents a non-invasive circuit model-based sensing method suitable for a high bandwidth, hard-switching converter power MOSFET junction temperature estimation without any additional temperature detector. For the purpose of demonstrating MOSFET junction temperature sensing, a chopper circuit is used. The ringing superimposed with a circuit load current is used for MOSFET junction temperature estimation. A `gate drive-RDS-on-L-C' resonant model is implemented indicating the mechanism of power MOSFET turn-on dynamics. Modeling includes the gate-drive output parasitics, power MOSFET intrinsic parameters, PCB parasitics and load parasitics. To evaluate the methodology, LTSpice Simulation and experimental results are studied.

Proceedings ArticleDOI
23 Apr 2013
TL;DR: In this paper, an analytical method to calculate the inverter IGBT loss and water cooling system was presented, which is in good agreement with experimental values, which affirmed the accuracy of the analytical method and verified the correctness and feasibility of the method.
Abstract: This paper presented an analytical method to calculate the inverter IGBT loss and water cooling system. In the implementation process, the effect of gate drive resistor, DC bus voltage, temperature and junction temperature on the IGBT loss were taken into comprehensive consideration for the first time. The method to calculate inverter IGBT and Diode conduction loss, switching loss, total loss, efficiency, temperature difference and junction temperature were given under the SVPWM modulation algorithm. Taking the interaction characteristics of the IGBT loss and junction temperature into account, the interaction of the loop algorithm was presented on the initial condition of the ambient temperature using the custom thermal circuit model, the IGBT junction temperature, case temperature and radiator temperature curve were given finally. On this basis, a medium voltage variable frequency speed control system with water cooling system was designed, it is in good agreement with experimental values, which affirmed the accuracy of the analytical method and verified the correctness and feasibility of the method.

Journal ArticleDOI
TL;DR: The enhanced surface emissivity and heat dissipation efficiency of the molecular fan coating are shown to correlate with the quantization of lattice modes in active nanomaterials, and the mechanisms of radiative cooling, radiative/non-radiative, and non- Radiative heat re-accumulation are explained.
Abstract: Molecular fan, a radiative cooling by thin film, has been developed and its application for compact electronic devices has been evaluated. The enhanced surface emissivity and heat dissipation efficiency of the molecular fan coating are shown to correlate with the quantization of lattice modes in active nanomaterials. The highly quantized G and 2D bands in graphene are achieved by our dispersion technique, and then incorporated in an organic-inorganic acrylate emulsion to form a coating assembly on heat sinks (for LED and CPU). This water-based dielectric layer coating has been formulated and applied on metal core printed circuit boards. The heat dissipation efficiency and breakdown voltage are evaluated by a temperature-monitoring system and a high-voltage breakdown tester. The molecular fan coating on heat dissipation units is able to decrease the equilibrium junction temperature by 29.1 ° C, while functioning as a dielectric layer with a high breakdown voltage (>5 kV). The heat dissipation performance of the molecular fan coating applied on LED devices shows that the coated 50 W LED gives an enhanced cooling of 20% at constant light brightness. The schematics of monolayer graphene dispersion, undispersed graphene platelet, and continuous graphene sheet are illustrated and discussed to explain the mechanisms of radiative cooling, radiative/non-radiative, and non-radiative heat re-accumulation.

01 Jan 2013
TL;DR: In this paper, the effect of junction temperature between 300 and 550 K on the large-signal characteristics of the device for both continuous wave (CW) and pulsed modes of operation was studied.
Abstract: The authors have developed a large-signal simulation technique extending an in-house small-signal simulation code for analyzing a 94 GHz double-drift region impact avalanche transit time device based on silicon with a non-sinusoidal voltage excitation and studied the effect of junction temperature between 300 and 550 K on the large-signal characteristics of the device for both continuous wave(CW) and pulsed modes of operation.Results show that the large-signal RF power output of the device in both CW and pulsed modes increases with the increase of voltage modulation factor up to 60%,but decreases sharply with further increase of voltage modulation factor for a particular junction temperature;while the same parameter increases with the increase of junction temperature for a particular voltage modulation factor.Heat sinks made of copper and type-IIA diamond are designed to carry out the steady-state and transient thermal analysis of the device operating in CW and pulsed modes respectively. Authors have adopted Olson’s method to carry out the transient analysis of the device,which clearly establishes the superiority of type-IIA diamond over copper as the heat sink material of the device from the standpoint of the undesirable effect of frequency chirping due to thermal transients in the pulsed mode.

Journal ArticleDOI
TL;DR: In this paper, a thermal transient effect (TTE) was observed by the pulsed currents and consequent errors were introduced, and a group of experiments were used to reveal the TTE during Tj measurement for high-voltage (HV) LEDs.
Abstract: The diode forward voltage method with pulsed currents was widely used for monitoring junction temperature (Tj) of light-emitting diodes (LEDs). However, a thermal transient effect (TTE) was observed by the pulsed currents and consequent errors were introduced. Thermoelectric physics was conducted to explain this phenomena and a group of experiments was used to reveal the TTE during Tj measurement for high-voltage (HV) LEDs. In addition, an improved pulse-free direct junction temperature measurement method was conducted for HV LEDs to reduce the errors and to achieve in situ Tj measurement with dc currents, simpler setups, and a less step sequence.

Proceedings ArticleDOI
17 Oct 2013
TL;DR: In this paper, a generic design method for choosing both the IGBT current rating and the heatsink thermal resistance in order to satisfy a reliability constraint is proposed, and a parametric electro-thermal model has been developed to determine the junction temperature time series.
Abstract: Direct Wave Energy Converters offer high reliability potential, which is a key factor in offshore environments, yet their electrical power produced is strongly pulsating. The thermal cycling of their power electronic switches (considered here to be Insulated Gate Bipolar Transistors, IGBT) may reduce the lifetime of the power electronic converter. This study proposes a generic design method for choosing both the IGBT current rating and the heatsink thermal resistance in order to satisfy a reliability constraint. A parametric electro-thermal model has thus been developed to determine the junction temperature time series. Moreover, a rainflow cycle counting method is introduced for the reliability analysis and lifetime prediction using two aging models, one for wire bonds, the other for the solder joint of the chip.

Proceedings ArticleDOI
01 Sep 2013
TL;DR: In this paper, the major physical constraints, design considerations and modern power and thermal management techniques and demonstrate them on an Intel Core(tm) i7 system are described and compared.
Abstract: Power and thermal are major constraints for delivering compute performance in high-end CPU and are expected to be so in the future. For high end processors, junction temperature has been considered the toughest physical constraint that needs to be tightly managed. Recent trends in form-factors and the increased focus on thin and light systems such as Ultra Book, tablet computers and smartphones, shift the challenge away from junction temperature. Ergonomic thermal considerations and power delivery are becoming the limiters for delivering high computational performance density and need to be managed and controlled. In this paper we describe the major physical constraints, design considerations and modern power and thermal management techniques and demonstrate them on an Intel Core(tm) i7 system.