F
F. Ponthenier
Researcher at University of Grenoble
Publications - 17
Citations - 416
F. Ponthenier is an academic researcher from University of Grenoble. The author has contributed to research in topics: Silicon on insulator & MOSFET. The author has an hindex of 7, co-authored 17 publications receiving 315 citations.
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Proceedings ArticleDOI
3DVLSI with CoolCube process: An alternative path to scaling
Perrine Batude,Claire Fenouillet-Beranger,L. Pasini,V. Lu,F. Deprat,Laurent Brunet,Benoit Sklenard,F. Piegas-Luce,M. Casse,B. Mathieu,O. Billoint,G. Cibrario,Ogun Turkyilmaz,Hossam Sarhan,Sebastien Thuries,Louis Hutin,S. Sollier,Julie Widiez,L. Hortemel,Claude Tabone,M.-P. Samson,Bernard Previtali,N. Rambal,F. Ponthenier,J. Mazurier,Remi Beneyton,M. Bidaud,Emmanuel Josse,E. Petitprez,O. Rozeau,Maurice Rivoire,C. Euvard-Colnat,A. Seignard,F. Fournel,L. Benaissa,Perceval Coudrain,P. Leduc,J.M. Hartmann,Pascal Besson,Sebastien Kerdiles,C. Bout,Fabrice Nemouchi,A. Royer,C. Agraffeil,G. Ghibaudo,Thomas Signamarcheix,Michel Haond,Fabien Clermidy,O. Faynot,Maud Vinet +49 more
TL;DR: In this paper, the authors propose a 3D VLSI with a CoolCube integration to vertically stack several layers of devices with a unique connecting via density above a million/mm2.
Proceedings ArticleDOI
3D Sequential Integration: Application-driven technological achievements and guidelines
Perrine Batude,Laurent Brunet,C. Fenouillet-Beranger,Francois Andrieu,J.-P. Colinge,Didier Lattard,E. Vianello,Sebastien Thuries,O. Billoint,Pascal Vivet,Cristiano Santos,B. Mathieu,Benoit Sklenard,C.-M. V. Lu,J. Micout,F. Deprat,E. Avelar Mercado,F. Ponthenier,N. Rambal,M.-P. Samson,M. Casse,Sebastien Hentz,Julien Arcamone,Gilles Sicard,Louis Hutin,L. Pasini,A. Ayres,O. Rozeau,R. Berthelon,Fabrice Nemouchi,Philippe Rodriguez,J.-B. Pin,D. Larmagnac,A. Duboust,V. Ripoche,S. Barraud,N. Allouti,Sébastien Barnola,C. Vizioz,J.M. Hartmann,Sebastien Kerdiles,P. Acosta Alba,S. Beaurepaire,V. Beugin,F. Fournel,Pascal Besson,Virginie Loup,R. Gassilloud,François Martin,X. Garros,Frédéric Mazen,Bernard Previtali,C. Euvrard-Colnat,V. Balan,C. Comboroure,M. Zussy,Mazzocchi,O. Faynot,M. Vinet +58 more
TL;DR: 3D Sequential Integration with ultra-small 3D contact pitch with Ultra-Low TB FETs has potential for low-power applications and allow for the stacking of multiple layers.
Proceedings ArticleDOI
First demonstration of a CMOS over CMOS 3D VLSI CoolCube™ integration on 300mm wafers
Laurent Brunet,Perrine Batude,Claire Fenouillet-Beranger,P. Besombes,L. Hortemel,F. Ponthenier,Bernard Previtali,Claude Tabone,A. Royer,C. Agraffeil,C. Euvrard-Colnat,A. Seignard,Christophe Morales,F. Fournel,L. Benaissa,Thomas Signamarcheix,Pascal Besson,M. Jourdan,R. Kachtouli,V. Benevent,J.M. Hartmann,C. Comboroure,N. Allouti,Nicolas Posseme,C. Vizioz,Christian Arvet,Sébastien Barnola,Sebastien Kerdiles,L. Baud,L. Pasini,C.-M. V. Lu,F. Deprat,Alain Toffoli,G. Romano,C. Guedj,Vincent Delaye,Frederic Boeuf,O. Faynot,Maud Vinet +38 more
TL;DR: In this article, a full 3D CMOS over CMOS CoolCube integration is demonstrated with a top level compatible with state of the art high performance FDSOI (Fully-Depleted Silicon On Insulator) process requirements such as High-k/metal gate or raised source and drain.
Proceedings ArticleDOI
Active Interposer Technology for Chiplet-Based Advanced 3D System Architectures
P. Coudrain,Jean Charbonnier,Arnaud Garnier,Pascal Vivet,Remi Velard,Andrea Vinci,F. Ponthenier,Alexis Farcy,Roselyne Segaud,P. Chausse,Lucile Arnaud,Didier Lattard,Eric Guthmuller,Giovanni Romano,Alain Gueugnot,Frédéric Berger,Jerome Beltritti,Therry Mourier,Mathilde Gottardi,Stephane Minoret,C. Ribiere,Gilles Romero,Pierre-Emile Philip,Yorrick Exbrayat,Daniel Scevola,Didier Campos,Maxime Argoud,Nacima Allouti,Raphael Eleouet,Cesar Fuguet Tortolero,Christophe Aumont,Denis Dutoit,Corinne Legalland,Jean Michailos,Severine Cheramy,Gilles Simon +35 more
TL;DR: The first successful technology integration of chiplets on an active silicon interposer, fully processed, packaged and tested is reported.
Proceedings ArticleDOI
Monolithic 3D integration: A powerful alternative to classical 2D scaling
M. Vinet,Perrine Batude,Claire Fenouillet-Beranger,Fabien Clermidy,Laurent Brunet,O. Rozeau,JM Hartmannn,O. Billoint,G. Cibrario,Bernard Previtali,Claude Tabone,Benoit Sklenard,Ogun Turkyilmaz,F. Ponthenier,N. Rambal,M.-P. Samson,F. Deprat,V. Lu,L. Pasini,Sebastien Thuries,Hossam Sarhan,J-E. Michallet,O. Faynot +22 more
TL;DR: In this paper, the potential solutions to obtain a high performance low temperature top transistor while keeping bottom MOSFET integrity are discussed. And the opportunities brought by M3DI and highlights the applications benefiting from this small 3D contact pitch.