M
Massoud Pedram
Researcher at University of Southern California
Publications - 812
Citations - 25236
Massoud Pedram is an academic researcher from University of Southern California. The author has contributed to research in topics: Energy consumption & CMOS. The author has an hindex of 77, co-authored 780 publications receiving 23047 citations. Previous affiliations of Massoud Pedram include University of California, Berkeley & Syracuse University.
Papers
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Proceedings ArticleDOI
Post sign-off leakage power optimization
TL;DR: This paper sets up a novel transformation technique to manipulate the constraints of the optimization problem to be solved by using conjugate gradient (CG) method and shows that by doing this optimization, it can reduce the leakage power consumption by 34% on average in comparison with no power optimization after sign-off.
Proceedings ArticleDOI
Better Than Worst-Case Decoding for Quantum Error Correction
Gokul Subramanian Ravi,Jonathan M. Baker,Arash Fayyazi,Sophia Fuhui Lin,Ali Javadi-Abhari,Massoud Pedram,Frederic T. Chong +6 more
TL;DR: A lightweight cryogenic on-chip Clique decoder which is able to accurately decode the common-case error signatures which are trivial to decipher, thereby alleviating the bottlenecks described above.
Proceedings ArticleDOI
Online fault detection and fault tolerance in electrical energy storage systems
TL;DR: An enhanced EES array reconfiguration architecture that serves as the hardware support is described, and efficient algorithms for online fault detection and tolerance are presented.
Proceedings ArticleDOI
Logical-physical co-design for deep submicron circuits: challenges and solutions
TL;DR: This paper discusses three technologies which are key to performing logic synthesis and physical layout optimization in tandem: early floorplanning, layout-driven logic synthesis, and post-layout resynthesis.
Journal ArticleDOI
Statistical estimation of leakage power dissipation in nano-scale complementary metal oxide semiconductor digital circuits using generalised extreme value distribution
TL;DR: An accurate approach for the estimation of statistical distribution of leakage power consumption in the presence of process variations in nano-scale complementary metal oxide semiconductor (CMOS) technologies using a generalised extreme value (GEV) distribution.