Massoud Pedram

TL;DR: Work by previous researchers is extended to manage complex spatio-temporal correlations by using lag-one Markov Chains and conditional probabilities and a comparative analysis presented for benchmark circuits demonstrates the accuracy and the practicality of the method.

TL;DR: A new timing-driven placement algorithm, which attempts to minimize zigzags and crisscrosses on the timing-critical paths of a circuit and integrates this idea into a recursive bipartitioning-based placement framework with a min-cut objective function.

TL;DR: This work proposes a reconfigurable power delivery network architecture, comprised of a small number of DC-DC converters, a switch network and an online controller, to realize fine-grained DVS in large-area OLED display panels, which consistently achieves high power conversion efficiency and significant energy saving while preserving the image quality.

TL;DR: Simulation results reveal that the predicted timing degradation in the case of the dynamic scenario is significantly different than those of the other scenarios, demonstrating that for accurate estimation of the circuit lifetime under the BTI effect, theynamic scenario should be adopted as part of the standard design flows.

TL;DR: Smart Butterfly is presented, a core-state-aware NoC power-gating scheme based on flattened butterfly that utilizes the active/sleep state information of processing cores to improve power- gating effectiveness.