Journal ArticleDOI
A low-voltage design technique for RF integrated circuits
TLDR
In this paper, an integrated RF circuit topology that can be used to realize low voltage (i.e., 1 V) RF integrated circuits is presented. But, the low-voltage version has a similar distortion specification as the classic 2 V low-noise cascode amplifier and a 0.22 dB improvement in noise figure.Abstract:
We report an integrated RF circuit topology that can be used to realize low voltage (i.e., 1 V) RF integrated circuits. The scheme uses on-chip capacitively coupled resonating elements to DC isolate circuit elements that under the present art are connected in series and share a common DC current. The topology is applied to several commonly used RF integrated circuit topologies (i.e., low-noise amplifiers and mixers). A comparison is made between a low-voltage version of a cascode amplifier and the classic cascode amplifier. The low-voltage version (i.e., 1 V) is shown to have a similar distortion specification as the classic 2 V low-noise cascode amplifier. The low-voltage version has a 0.22 dB improvement in noise figure.read more
Citations
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Journal ArticleDOI
A low supply voltage SiGe LNA for ultra-wideband frontends
TL;DR: In this paper, a low-power low-noise amplifier (LNA) for ultra-wideband (UWB) radio systems is presented, which uses peaking and feedback techniques to optimize its gain, bandwidth and impedance matching.
Journal ArticleDOI
A 0.5-V Biomedical System-on-a-Chip for Intrabody Communication System
TL;DR: A low-voltage and low-power monolithic biomedical system-on-a-chip (SOC) consisting of a receiver, a transmitter, a microcontrol unit, and an analog-to-digital converter, implemented in a 0.18-μm CMOS technology for intrabody communication is first reported.
Journal ArticleDOI
A 5.25-GHz CMOS folded-cascode even-harmonic mixer for low-voltage applications
TL;DR: In this article, a 5.25 GHz folded-cascode even-harmonic mixer (FEHM) is proposed for low-voltage applications, which employs the folded technique to reduce the headroom voltage, a current reuse circuit in the RF stage to improve its linearity, and the frequency-doubling technique in the local oscillator (LO) stage to produce an LO double-frequency signal.
Journal ArticleDOI
Low-voltage 1.9-GHz front-end receiver in 0.5-/spl mu/m CMOS technology
TL;DR: In this article, a 1.9 GHz front-end receiver with a low-noise amplifier and a down-conversion mixer is proposed for personal communications standard PCS1900.
Journal ArticleDOI
Stacked Spirals for Biosensor Telemetry
TL;DR: In this article, an inductive power transmission coil for biosensor-based telemetric implants is presented, which reduces the consumed space and the self-resonant frequency (SRF) of the spiral and the required power transmission frequency for the implanted device.
References
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Journal ArticleDOI
A 1.5-V, 1.5-GHz CMOS low noise amplifier
D.K. Shaeffer,Thomas H. Lee +1 more
TL;DR: In this article, a 1.5 GHz low noise amplifier (LNA) intended for use in a global positioning system (GPS) receiver, has been implemented in a standard 0.6/spl mu/m CMOS process.
Journal ArticleDOI
Design considerations for direct-conversion receivers
TL;DR: The issues and tradeoffs in the design and monolithic implementation of direct-conversion receivers are described and circuit techniques that can alleviate the drawbacks of this architecture are proposed.
Journal ArticleDOI
A 1.9-GHz wide-band IF double conversion CMOS receiver for cordless telephone applications
Jacques C. Rudell,Jia-Jiunn Ou,Thomas Byunghak Cho,George Chien,F. Brianti,J.A. Weldon,Paul R. Gray +6 more
TL;DR: A description is given of a wide-band IF with double conversion architecture which eliminates the need for the discrete-component noise and IF filters in addition to facilitating the eventual integration of the frequency synthesizer blocks with on-chip VCO's.
Journal ArticleDOI
A 1 GHz CMOS RF front-end IC for a direct-conversion wireless receiver
TL;DR: An integrated low-noise amplifier and down-conversion mixer operating at 1 GHz has been fabricated for the first time in 1 /spl mu/m CMOS as discussed by the authors, where the overall conversion gain is almost 20 dB, the double-sideband noise figure is 3.2 dB, and the IIP3 is +8 dBm.
Journal ArticleDOI
A 2.7 V 900 MHz CMOS LNA and mixer
TL;DR: In this paper, a CMOS low-noise amplifier (LNA) and a mixer for RF front-end applications are described, and a current reuse technique is described that increases amplifier transconductance for the LNA and mixer without increasing power dissipation, compared to standard topologies.