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Journal ArticleDOI

Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization

Christian Enz, +1 more
- Vol. 84, Iss: 11, pp 1584-1614
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TLDR
In this paper, some old and new circuit techniques are described for the compensation of the amplifier's most important nonideal effects including the noise (mainly thermal and 1/f noise), the input-referred dc offset voltage as well as the finite gain.
Abstract
In linear IC's fabricated in a low-voltage CMOS technology, the reduction of the dynamic range due to the dc offset and low frequency noise of the amplifiers becomes increasingly significant. Also, the achievable amplifier gain is often quite low in such a technology, since cascoding may not be a practical circuit option due to the resulting reduction of the output signal swing. In this paper, some old and some new circuit techniques are described for the compensation of the amplifier's most important nonideal effects including the noise (mainly thermal and 1/f noise), the input-referred dc offset voltage as well as the finite gain resulting in a nonideal virtual ground at the input.

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Citations
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Journal ArticleDOI

A Review of CMOS Electrochemical Readout Interface Designs for Biomedical Assays

TL;DR: In this article, the state-of-the-art electrochemical readout interfaces using CMOS technology for biomarker detection are reviewed for point of care (POC) testing.
Patent

Receiver with chopper stabilization and method thereof

TL;DR: In this article, a receiver (202) has a down-conversion receiver (304) for transforming a signal from a first operating frequency to a second frequency that is lower than the first one, and a receiver filter (308) with chopper stabilization for filtering unwanted portions of the signal (306) at the second operating frequency and for generating a final filtered signal (203).
Journal ArticleDOI

Design and Optimization of a Low Power Pressure Sensor for Wireless Biomedical Applications

TL;DR: The piezoresistance values are increased in order to reduce by one order of magnitude the power consumption in comparison with literature approaches and obtained a digital sensor with high sensitivity, low noise, and low power consumption.
Proceedings ArticleDOI

A Novel Interface Circuit for Capacitive Sensors Using Correlated Double Sampling Demodulation Technique

TL;DR: A significant method of correlated double sampling (CDS) technique can be employed to the proposed sample-and-hold demodulation structure which can diminish the problem of capacitance mismatch.
Book ChapterDOI

Dynamic Offset Cancellation Techniques for Operational Amplifiers

TL;DR: This chapter reviews precision techniques that can be used to achieve low 1/f noise and low offset in operational amplifiers.
References
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Book

Principles of Data Conversion System Design

Behzad Razavi
TL;DR: This advanced text and reference covers the design and implementation of integrated circuits for analog-to-digital and digital-toanalog conversion and systematically leads the reader to advanced topics, describing design issues and techniques at both circuit and system level.
Journal ArticleDOI

A 4-MHz CMOS continuous-time filter with on-chip automatic tuning

TL;DR: This paper presents a 3rd order low-pass continuous-time filter with 4 MHz cut-off frequency, integrated in a 3 μm CMOS process, based on the direct simulation of a doubly-terminated LC ladder using capacitors and fully-balanced, current-controlled transconductance amplifiers with extended linear range.
Proceedings Article

A 4-MHz CMOS Continuous-Time Filter with On-Chip Automatic Tuning

TL;DR: In this article, a 3rd order low-pass continuous-time filter with 4 MHz cut-off frequency, integrated in a 3?m CMOS process, is presented, based on direct simulation of a doublyterminated LC ladder using capacitors and fully-balanced, current-controlled transconductance amplifiers with extended linear range.
Journal ArticleDOI

Design techniques for high-speed, high-resolution comparators

TL;DR: In this article, precision techniques for the design of comparators used in high-performance analog-to-digital converters employing parallel conversion stages are described, and circuit designs achieving 12-b resolution in both BiCMOS and CMOS 5-V technologies are presented.
MonographDOI

Switched-currents : an analogue technique for digital technology

TL;DR: This book discusses the evolution of Analogue Sampled-Data Signal Processing, the architecture of Switched-Current Circuits, and the non-linear Behaviour of Switches-Current Memory Circuits.
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