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Journal ArticleDOI

Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization

Christian Enz, +1 more
- Vol. 84, Iss: 11, pp 1584-1614
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TLDR
In this paper, some old and new circuit techniques are described for the compensation of the amplifier's most important nonideal effects including the noise (mainly thermal and 1/f noise), the input-referred dc offset voltage as well as the finite gain.
Abstract
In linear IC's fabricated in a low-voltage CMOS technology, the reduction of the dynamic range due to the dc offset and low frequency noise of the amplifiers becomes increasingly significant. Also, the achievable amplifier gain is often quite low in such a technology, since cascoding may not be a practical circuit option due to the resulting reduction of the output signal swing. In this paper, some old and some new circuit techniques are described for the compensation of the amplifier's most important nonideal effects including the noise (mainly thermal and 1/f noise), the input-referred dc offset voltage as well as the finite gain resulting in a nonideal virtual ground at the input.

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Book

Design of Analog CMOS Integrated Circuits

Behzad Razavi
TL;DR: The analysis and design techniques of CMOS integrated circuits that practicing engineers need to master to succeed can be found in this article, where the authors describe the thought process behind each circuit topology, but also consider the rationale behind each modification.
Journal ArticleDOI

A 2 $\mu\hbox{W}$ 100 nV/rtHz Chopper-Stabilized Instrumentation Amplifier for Chronic Measurement of Neural Field Potentials

TL;DR: The monolithic architect and micropower low-noise low-supply operation could help enable applications ranging from neuroprosthetics to seizure monitors that require a small form factor and battery operation.
Journal ArticleDOI

Behavioral modeling of switched-capacitor sigma-delta modulators

TL;DR: This paper presents a complete set of blocks implemented in the popular MATLAB SIMULINK environment, which allows designers to perform time-domain behavioral simulations of switched-capacitor sigma-delta (/spl Sigma//spl Delta/) modulators.
Journal ArticleDOI

A 60 $\mu$ W 60 nV/ $\surd$ Hz Readout Front-End for Portable Biopotential Acquisition Systems

TL;DR: A low-power and low-noise readout front-end with configurable characteristics for Electroencephalogram (EEG), Electrocardiogram (ECG), and Electromyogram (EMG) signals is implemented with key to its performance is the new AC-coupled chopped instrumentation amplifier.
Journal ArticleDOI

A CMOS smart temperature sensor with a 3/spl sigma/ inaccuracy of /spl plusmn/0.1/spl deg/C from -55/spl deg/C to 125/spl deg/C

TL;DR: In this paper, a low-cost temperature sensor with on-chip sigma-delta ADC and digital bus interface was realized in a 0.5 /spl mu/m CMOS process.
References
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Journal ArticleDOI

Exact analysis of switched capacitor circuits with arbitrary inputs

TL;DR: A general formulation procedure and an exact analysis in the frequency domain for switched capacitor circuits with arbitrary inputs including cisoidal, sample-and-hold, and noise, are presented.
Journal ArticleDOI

A parasitic-insensitive area-efficient approach to realizing very large time constants in switched-capacitor circuits

TL;DR: In this paper, a switched-capacitor technique for realizing very large time constants is presented, which is insensitive to parasitic capacitances and is very area-efficient and does not require a complicated clocking scheme.
Journal ArticleDOI

A differential switched-capacitor amplifier

TL;DR: In this paper, a monolithic realization of a switched-capacitor amplifier is reported, which has op-amp offset voltage cancellation without requiring the output to slew to ground each time the amplifier is reset.
Journal ArticleDOI

Improved offset-compensation schemes for switched-capacitor circuits

TL;DR: In this article, a switch-capacitor stage which is free from the effects of op-amp DC offset voltage is described and the op-amps used in the stage need not slew between the desired output voltage and the offset voltage as in previously described offset-free circuits.
Journal ArticleDOI

An offset reduction technique for use with CMOS integrated comparators and amplifiers

TL;DR: In this article, a comparator that adjusts its own offset either at power-up or in response to a control input is presented, and the nature of the offset adjustment is such that the comparator is capable of continuous-time operation.
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