Journal ArticleDOI
Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization
Christian Enz,Gabor C. Temes +1 more
- Vol. 84, Iss: 11, pp 1584-1614
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TLDR
In this paper, some old and new circuit techniques are described for the compensation of the amplifier's most important nonideal effects including the noise (mainly thermal and 1/f noise), the input-referred dc offset voltage as well as the finite gain.Abstract:
In linear IC's fabricated in a low-voltage CMOS technology, the reduction of the dynamic range due to the dc offset and low frequency noise of the amplifiers becomes increasingly significant. Also, the achievable amplifier gain is often quite low in such a technology, since cascoding may not be a practical circuit option due to the resulting reduction of the output signal swing. In this paper, some old and some new circuit techniques are described for the compensation of the amplifier's most important nonideal effects including the noise (mainly thermal and 1/f noise), the input-referred dc offset voltage as well as the finite gain resulting in a nonideal virtual ground at the input.read more
Citations
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Patent
ADC preamplifier and the multistage auto-zero technique
TL;DR: In this article, a sample and hold amplifier with a multi-stage zeroing architecture is presented, which reduces effects of parasitic capacitance exponentially over prior attempts, which yields increased accuracy.
Proceedings ArticleDOI
An analog front-end IC with regulated R-I amplifier and CDS CTIA for microbolometer
Jindeok Seo,Gyungtae Kim,Kyomuk Lim,Changho Seok,Hyunho Kim,Seunghyun Im,Ji-Hoon Kim,Choul-Young Kim,Hyoungho Ko +8 more
TL;DR: In this article, an analog front-end design that can improve the performance of the readout integrated circuit (ROIC) for the microbolometer infrared focal plane array (FPA) was presented.
Journal ArticleDOI
A novel 0.7 V high sensitivity complementary differential MAGFET sensor for contactless mechatronic applications
TL;DR: In this paper, a low-voltage complementary differential magnetic field effect transistor (CDMAGFET) with enhanced magnetic field sensing capability compared to previously reported NMOS only MAGFETs or the single-ended cross-coupled magneto-magnetic effect transistor was proposed.
Journal ArticleDOI
A sige BiCMOS instrumentation channel for extreme environment applications
Chandradevi Ulaganathan,N. Nambiar,K. Cornett,Robert Greenwell,Jeremy A. Yager,Benjamin S. Prothro,Kevin Tham,Suheng Chen,Richard S. Broughton,Guoyuan Fu,Benjamin J. Blalock,Charles L. Britton,M. Nance Ericson,H. Alan Mantooth,M. Mojarradi,Richard W. Berger,John D. Cressler +16 more
TL;DR: A instrumentation channel has been designed, implemented and tested in a 0.5-mum SiGe BiCMOS process that interfaces a range of external sensors to signal processing circuits and supports input signals up to 200 Hz.
Proceedings ArticleDOI
A 92.4dB SNDR 24kHz ΔΕ modulator consuming 352μW
TL;DR: This paper presents a discrete time ΔΣ modulator operating under 1V power supply to achieve high precision under low voltage while preserve low power consumption, techniques from systematic level to circuits' level are used.
References
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Book
Principles of Data Conversion System Design
TL;DR: This advanced text and reference covers the design and implementation of integrated circuits for analog-to-digital and digital-toanalog conversion and systematically leads the reader to advanced topics, describing design issues and techniques at both circuit and system level.
Journal ArticleDOI
A 4-MHz CMOS continuous-time filter with on-chip automatic tuning
Francois Krummenacher,N. Joehl +1 more
TL;DR: This paper presents a 3rd order low-pass continuous-time filter with 4 MHz cut-off frequency, integrated in a 3 μm CMOS process, based on the direct simulation of a doubly-terminated LC ladder using capacitors and fully-balanced, current-controlled transconductance amplifiers with extended linear range.
Proceedings Article
A 4-MHz CMOS Continuous-Time Filter with On-Chip Automatic Tuning
Francois Krummenacher,N. Joehl +1 more
TL;DR: In this article, a 3rd order low-pass continuous-time filter with 4 MHz cut-off frequency, integrated in a 3?m CMOS process, is presented, based on direct simulation of a doublyterminated LC ladder using capacitors and fully-balanced, current-controlled transconductance amplifiers with extended linear range.
Journal ArticleDOI
Design techniques for high-speed, high-resolution comparators
Behzad Razavi,Bruce A. Wooley +1 more
TL;DR: In this article, precision techniques for the design of comparators used in high-performance analog-to-digital converters employing parallel conversion stages are described, and circuit designs achieving 12-b resolution in both BiCMOS and CMOS 5-V technologies are presented.
MonographDOI
Switched-currents : an analogue technique for digital technology
TL;DR: This book discusses the evolution of Analogue Sampled-Data Signal Processing, the architecture of Switched-Current Circuits, and the non-linear Behaviour of Switches-Current Memory Circuits.