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Journal ArticleDOI

Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization

Christian Enz, +1 more
- Vol. 84, Iss: 11, pp 1584-1614
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TLDR
In this paper, some old and new circuit techniques are described for the compensation of the amplifier's most important nonideal effects including the noise (mainly thermal and 1/f noise), the input-referred dc offset voltage as well as the finite gain.
Abstract
In linear IC's fabricated in a low-voltage CMOS technology, the reduction of the dynamic range due to the dc offset and low frequency noise of the amplifiers becomes increasingly significant. Also, the achievable amplifier gain is often quite low in such a technology, since cascoding may not be a practical circuit option due to the resulting reduction of the output signal swing. In this paper, some old and some new circuit techniques are described for the compensation of the amplifier's most important nonideal effects including the noise (mainly thermal and 1/f noise), the input-referred dc offset voltage as well as the finite gain resulting in a nonideal virtual ground at the input.

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Citations
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Journal ArticleDOI

DVCC-based very low-offset current-mode instrumentation amplifier

TL;DR: In this article, an alternative implementation of a chopper-modulated current-mode instrumentation amplifier is presented, which provides very low offset voltage at the output due to chopper modulation and residual offset removal path.
Journal ArticleDOI

A 24-bit delta—sigma ADC with an ultra-low noise chopper-stabilized programmable gain instrumentation amplifier

TL;DR: A 24-bit delta–sigma analog-to-digital converter with a programmable gain amplifier that achieves exceptionally high open loop gain with very low drift and ultra-low noise is presented.
Proceedings ArticleDOI

New CMOS instrumentation amplifier dedicated to very low-amplitude signal applications

TL;DR: A new low-voltage low-power CMOS instrumentation amplifier used, among others, for biomedical applications and the preliminary test results are consistent with the simulation.
Journal ArticleDOI

Chopper-Stabilized Low-Noise Multipath Operational Amplifier With Dual Ripple Rejection Loops

TL;DR: This brief presents a chopper-stabilized low-noise multipath operational amplifier with dual ripple rejection loops, which has a lower noise and a wider bandwidth than the conventional chopper amplifiers.
Journal ArticleDOI

An Offset-Cancelling Discrete-Time Analog Computer for Solving 1-D Wave Equations

TL;DR: The chip uses switched-capacitor (SC)-based fully differential analog circuits to build a discrete-time but continuous-valued finite difference solver with spatially programmable wave velocity, selectable boundary conditions, and arbitrary input excitation waveforms.
References
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Book

Principles of Data Conversion System Design

Behzad Razavi
TL;DR: This advanced text and reference covers the design and implementation of integrated circuits for analog-to-digital and digital-toanalog conversion and systematically leads the reader to advanced topics, describing design issues and techniques at both circuit and system level.
Journal ArticleDOI

A 4-MHz CMOS continuous-time filter with on-chip automatic tuning

TL;DR: This paper presents a 3rd order low-pass continuous-time filter with 4 MHz cut-off frequency, integrated in a 3 μm CMOS process, based on the direct simulation of a doubly-terminated LC ladder using capacitors and fully-balanced, current-controlled transconductance amplifiers with extended linear range.
Proceedings Article

A 4-MHz CMOS Continuous-Time Filter with On-Chip Automatic Tuning

TL;DR: In this article, a 3rd order low-pass continuous-time filter with 4 MHz cut-off frequency, integrated in a 3?m CMOS process, is presented, based on direct simulation of a doublyterminated LC ladder using capacitors and fully-balanced, current-controlled transconductance amplifiers with extended linear range.
Journal ArticleDOI

Design techniques for high-speed, high-resolution comparators

TL;DR: In this article, precision techniques for the design of comparators used in high-performance analog-to-digital converters employing parallel conversion stages are described, and circuit designs achieving 12-b resolution in both BiCMOS and CMOS 5-V technologies are presented.
MonographDOI

Switched-currents : an analogue technique for digital technology

TL;DR: This book discusses the evolution of Analogue Sampled-Data Signal Processing, the architecture of Switched-Current Circuits, and the non-linear Behaviour of Switches-Current Memory Circuits.
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