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Journal ArticleDOI

Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization

Christian Enz, +1 more
- Vol. 84, Iss: 11, pp 1584-1614
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TLDR
In this paper, some old and new circuit techniques are described for the compensation of the amplifier's most important nonideal effects including the noise (mainly thermal and 1/f noise), the input-referred dc offset voltage as well as the finite gain.
Abstract
In linear IC's fabricated in a low-voltage CMOS technology, the reduction of the dynamic range due to the dc offset and low frequency noise of the amplifiers becomes increasingly significant. Also, the achievable amplifier gain is often quite low in such a technology, since cascoding may not be a practical circuit option due to the resulting reduction of the output signal swing. In this paper, some old and some new circuit techniques are described for the compensation of the amplifier's most important nonideal effects including the noise (mainly thermal and 1/f noise), the input-referred dc offset voltage as well as the finite gain resulting in a nonideal virtual ground at the input.

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Citations
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Journal ArticleDOI

A Low-Power High-Precision Comparator With Time-Domain Bulk-Tuned Offset Cancellation

TL;DR: A novel time-domain bulk-tuned offset cancellation technique is applied to a low-power high-precision dynamic comparator to reduce its input-referred offset with minimal additional power consumption and delay.
Proceedings ArticleDOI

A 200μW Eight-Channel Acquisition ASIC for Ambulatory EEG Systems

TL;DR: A complete low-power EEG acquisition ASIC that is suitable for miniaturized ambulatory EEG measurement systems is described, not only to improve the patients' comfort but also to extend the device applications.
Journal ArticleDOI

A 100 MS/s, 10.5 Bit, 2.46 mW Comparator-Less Pipeline ADC Using Self-Biased Ring Amplifiers

TL;DR: An improved auto-zero scheme that eliminates the gain error caused by the parasitic capacitance across the auto- zero switch is introduced and a comparator-less pipeline ADC structure takes advantage of the characteristics of the ring-amplifier to replace the sub-ADC in each pipeline stage.
Journal ArticleDOI

A fully integrated, untrimmed CMOS instrumentation amplifier with submicrovolt offset

TL;DR: In this article, a low-noise CMOS instrumentation amplifier intended for low-frequency thermoelectric microsensor applications is presented that achieves sub-microvolt offset and noise.
Patent

Sleep stage detection

TL;DR: In this paper, the sleep stage of a patient was determined based on a frequency characteristic of a biosignal indicative of brain activity of the patient, such as a power level within one or more frequency bands of the bio-signal, a ratio of the power level in two or more frequencies bands, or a pattern in the power levels of one frequency band over time.
References
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Book

Principles of Data Conversion System Design

Behzad Razavi
TL;DR: This advanced text and reference covers the design and implementation of integrated circuits for analog-to-digital and digital-toanalog conversion and systematically leads the reader to advanced topics, describing design issues and techniques at both circuit and system level.
Journal ArticleDOI

A 4-MHz CMOS continuous-time filter with on-chip automatic tuning

TL;DR: This paper presents a 3rd order low-pass continuous-time filter with 4 MHz cut-off frequency, integrated in a 3 μm CMOS process, based on the direct simulation of a doubly-terminated LC ladder using capacitors and fully-balanced, current-controlled transconductance amplifiers with extended linear range.
Proceedings Article

A 4-MHz CMOS Continuous-Time Filter with On-Chip Automatic Tuning

TL;DR: In this article, a 3rd order low-pass continuous-time filter with 4 MHz cut-off frequency, integrated in a 3?m CMOS process, is presented, based on direct simulation of a doublyterminated LC ladder using capacitors and fully-balanced, current-controlled transconductance amplifiers with extended linear range.
Journal ArticleDOI

Design techniques for high-speed, high-resolution comparators

TL;DR: In this article, precision techniques for the design of comparators used in high-performance analog-to-digital converters employing parallel conversion stages are described, and circuit designs achieving 12-b resolution in both BiCMOS and CMOS 5-V technologies are presented.
MonographDOI

Switched-currents : an analogue technique for digital technology

TL;DR: This book discusses the evolution of Analogue Sampled-Data Signal Processing, the architecture of Switched-Current Circuits, and the non-linear Behaviour of Switches-Current Memory Circuits.
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