Journal ArticleDOI
Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization
Christian Enz,Gabor C. Temes +1 more
- Vol. 84, Iss: 11, pp 1584-1614
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TLDR
In this paper, some old and new circuit techniques are described for the compensation of the amplifier's most important nonideal effects including the noise (mainly thermal and 1/f noise), the input-referred dc offset voltage as well as the finite gain.Abstract:
In linear IC's fabricated in a low-voltage CMOS technology, the reduction of the dynamic range due to the dc offset and low frequency noise of the amplifiers becomes increasingly significant. Also, the achievable amplifier gain is often quite low in such a technology, since cascoding may not be a practical circuit option due to the resulting reduction of the output signal swing. In this paper, some old and some new circuit techniques are described for the compensation of the amplifier's most important nonideal effects including the noise (mainly thermal and 1/f noise), the input-referred dc offset voltage as well as the finite gain resulting in a nonideal virtual ground at the input.read more
Citations
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Journal Article
Noise analysis of a fully integrated CMOS image sensor
TL;DR: In this paper, the read noise characteristics of a 3T photodiode-based CMOS active pixel image sensor IC are described and compared to the measured analog signal path noise.
Journal ArticleDOI
66.4: Invited Paper: Technical Issues on Large-Size, High-Resolution and High-Gray-Scale TFT-LCDs
Oh-Kyong Kwon,Jin-Ho Kim,Jae-Sic Lee,Jin-Chul Choi,Seon-Yung Kim,Chul-Sang Jang,Juhn-Suk Yoo,Dong-Hoon Lee,In-Jae Chung +8 more
TL;DR: In this article, the authors present a 10-bit gray scale TFT-LCD data driver for 42-inch diagonal size and WXGA format TFTLCD TV applications.
Journal ArticleDOI
An ultra-low noise capacitance to voltage converter for sensor applications in 0.35 µm CMOS
Alexander Utz,Christian Walk,Norbert Haas,Tatjana Fedtschenko,Alexander Stanitzki,M E Mokhtari,Michael Görtz,Michael Kraft,Rainer Kokozinski,Rainer Kokozinski +9 more
TL;DR: In this paper, the authors present a readout circuit for capacitive micro-electro-mechanical system (MEMS) sensors such as accelerometers, gyroscopes or pressure sensors.
Journal ArticleDOI
A 1 pF-to-10 nF Generic Capacitance-to-Digital Converter Using Zero-Crossing $\Delta\Sigma$ Modulation
TL;DR: The above three techniques complement each other and work as a whole leading to the proposed CDC with wide range, high resolution, high linearity, and low power consumption.
Journal ArticleDOI
Teaching cells to dance: the impact of transistor miniaturization on the manipulation of populations of living cells
Mélanie Abonnenc,Luigi Altomare,M. Baruffa,Valentina Ferrarini,Roberto Guerrieri,Bruno Iafelice,A. Leonardi,Nicolò Manaresi,Gianni Medoro,Aldo Romani,Marco Tartagni,Paul Vulto +11 more
TL;DR: In this paper, the authors review the impact that the current scaling trend in feature size of CMOS technology will have on a few basic operations, such as cell manipulation and sensing.
References
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Book
Principles of Data Conversion System Design
TL;DR: This advanced text and reference covers the design and implementation of integrated circuits for analog-to-digital and digital-toanalog conversion and systematically leads the reader to advanced topics, describing design issues and techniques at both circuit and system level.
Journal ArticleDOI
A 4-MHz CMOS continuous-time filter with on-chip automatic tuning
Francois Krummenacher,N. Joehl +1 more
TL;DR: This paper presents a 3rd order low-pass continuous-time filter with 4 MHz cut-off frequency, integrated in a 3 μm CMOS process, based on the direct simulation of a doubly-terminated LC ladder using capacitors and fully-balanced, current-controlled transconductance amplifiers with extended linear range.
Proceedings Article
A 4-MHz CMOS Continuous-Time Filter with On-Chip Automatic Tuning
Francois Krummenacher,N. Joehl +1 more
TL;DR: In this article, a 3rd order low-pass continuous-time filter with 4 MHz cut-off frequency, integrated in a 3?m CMOS process, is presented, based on direct simulation of a doublyterminated LC ladder using capacitors and fully-balanced, current-controlled transconductance amplifiers with extended linear range.
Journal ArticleDOI
Design techniques for high-speed, high-resolution comparators
Behzad Razavi,Bruce A. Wooley +1 more
TL;DR: In this article, precision techniques for the design of comparators used in high-performance analog-to-digital converters employing parallel conversion stages are described, and circuit designs achieving 12-b resolution in both BiCMOS and CMOS 5-V technologies are presented.
MonographDOI
Switched-currents : an analogue technique for digital technology
TL;DR: This book discusses the evolution of Analogue Sampled-Data Signal Processing, the architecture of Switched-Current Circuits, and the non-linear Behaviour of Switches-Current Memory Circuits.