Journal ArticleDOI
DC and analog/RF performance optimisation of source pocket dual work function TFET
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In this paper, the authors investigated a source pocket tunnel field effect transistor (SP TFET) with dual work function of single gate material by using uniform and Gaussian doping profile in the drain region for ultra-low power high frequency high speed applications.Abstract:
We investigate a systematic study of source pocket tunnel field-effect transistor (SP TFET) with dual work function of single gate material by using uniform and Gaussian doping profile in the drain region for ultra-low power high frequency high speed applications. For this, a n+ doped region is created near the source/channel junction to decrease the depletion width results in improvement of ON-state current. However, the dual work function of the double gate is used for enhancement of the device performance in terms of DC and analog/RF parameters. Further, to improve the high frequency performance of the device, Gaussian doping profile is considered in the drain region with different characteristic lengths which decreases the gate to drain capacitance and leads to drastic improvement in analog/RF figures of merit. Furthermore, the optimisation is performed with different concentrations for uniform and Gaussian drain doping profile and for various sectional length of lower work function of the gat...read more
Citations
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Journal ArticleDOI
Investigation of RF and linearity performance of electrode work-function engineered HDB vertical TFET
TL;DR: In this paper, a hetero-dielectric buried oxide vertical tunnel held effect transistor (HDB VTFET) was used to obtain the superior improvement in terms of different RF and linearity.
Journal ArticleDOI
A new design approach to improve DC, analog/RF and linearity metrics of Vertical TFET for RFIC design
Seema,Sudakar Singh Chauhan +1 more
TL;DR: This work investigates the impact of work-function engineering for the enhancement of the metrics such as DC, analog/RF and linearity parameters for the low-power, high-speed and high-frequency applications and demonstrates that VTFET offers the superior improvement in terms of steeper subthreshold slope.
Journal ArticleDOI
Controlling the ambipolarity and improvement of RF performance using Gaussian Drain Doped TFET
TL;DR: In this article, Gaussian doping is used in the drain region of conventional gate-drain overlap TFETs to control the tunneling of electrons from the valence band of channel to the conduction band of drain.
Journal ArticleDOI
High Performance Drain Engineered InGaN Heterostructure Tunnel Field Effect Transistor.
TL;DR: A drain engineered InGaN heterostructure tunnel field effect transistor (TFET) using an additional metal on the drain region to modulate the energy band near the drain/channel interface in the drain regions, and increase the tunneling barrier for the flow of holes under negative gate bias.
Journal ArticleDOI
Study of a Gate-Engineered Vertical TFET with GaSb/GaAs0.5Sb0.5 Heterojunction.
TL;DR: In this article, a dual material gate heterogeneous dielectric vertical TFET (DMG-HD-VTFET) with a lightly doped source-pocket is proposed. But the proposed structure adopts a GaSb/GaAs0.5 heterojunction at the source and pocket to improve the band-to-band tunneling (BTBT) rate; at the same time, the gate electrode is divided into two parts, namely a tunnel gate and control gate with work functions, where
References
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Journal ArticleDOI
Tunnel field-effect transistors as energy-efficient electronic switches
Adrian M. Ionescu,Heike Riel +1 more
TL;DR: Tunnels based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal–oxide–semiconductor transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.
Journal ArticleDOI
Tunneling Field-Effect Transistors (TFETs) With Subthreshold Swing (SS) Less Than 60 mV/dec
TL;DR: In this paper, a 70-nm n-channel tunneling field effect transistor (TFET) with sub-threshold swing (SS) of 52.8 mV/dec at room temperature was demonstrated.
Journal ArticleDOI
Double-Gate Tunnel FET With High- $\kappa$ Gate Dielectric
Kathy Boucart,Adrian M. Ionescu +1 more
TL;DR: In this article, a double-gate tunnel field effect transistor (DG tunnel FET) with a high-kappa gate dielectric was proposed and validated using realistic design parameters, showing an on-current as high as 0.23 mA for a gate voltage of 1.8 V, an off-current of less than 1 fA (neglecting gate leakage), an improved average sub-threshold swing of 57 mV/dec, and a minimum point slope of 11 mV /dec.
Journal ArticleDOI
Scaling the vertical tunnel FET with tunnel bandgap modulation and gate workfunction engineering
TL;DR: It is shown here that the tunnel FET performance is nearly independent of channel length scaling L and with /spl delta/p/sup +/ SiGe layer, scaling t/sub ox/ is not critical to Tunnel FET scaling.
Proceedings Article
Germanium-source tunnel field effect transistors with record high I ON /I OFF
TL;DR: Tunnel field effect transistors (TFETs) with record high I ON /I OFF ratio (≫106) for lowvoltage (0.5V) operation are achieved by using germanium in the source region to achieve a small tunnel bandgap.