Journal ArticleDOI
Effect of Drain Doping Profile on Double-Gate Tunnel Field-Effect Transistor and its Influence on Device RF Performance
TLDR
In this article, the effect of drain doping profile on a double-gate tunnel field effect transistor (DG-TFET) and its radio-frequency (RF) performances was investigated.Abstract:
In this paper, we have investigated the effect of drain doping profile on a double-gate tunnel field-effect transistor (DG-TFET) and its radio-frequency (RF) performances. Lateral asymmetric drain doping profile suppresses the ambipolar behavior, improves OFF-state current, reduces the gate-drain capacitance, and improves the RF performance. Further, placing the high-density layer in the channel near the source-channel junction, a reduction in the width of depletion region, improvement in ON-state current (I
ON
), and subthreshold slope are analyzed for this asymmetric drain doping. However, it also improves many RF figures of merit for the DG-TFET. Furthermore, lateral asymmetric doping effects on RF performances are also checked for the various channel length. Therefore, this paper would be beneficial for a new generation of RF circuits and systems in a broad range of applications and operating frequencies covering RF spectrum. So, the RF figures of merit for the DG-TFET are analyzed in terms of transconductance (g
m
), unit-gain cutoff frequency (f
T
), maximum frequency of oscillation (f
max
), and gain bandwidth product. For this, the RF figures of merit have been extracted from the V-parameter matrix generated by performing the small-signal ac analysis. Technology computer-aided design simulations have been performed by 2-D ATLAS, Silvaco International, Santa Clara, CA, USA.read more
Citations
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Journal ArticleDOI
Tunnel Field-Effect Transistors in 2-D Transition Metal Dichalcogenide Materials
Hesameddin Ilatikhameneh,Yaohua Tan,Bozidar Novakovic,Gerhard Klimeck,Rajib Rahman,Joerg Appenzeller +5 more
TL;DR: In this article, the performance of tunnel field effect transistors (TFETs) based on 2-D transition metal dichalcogenide (TMD) materials is investigated by atomistic quantum transport simulations.
Journal ArticleDOI
Tunnel Field-Effect Transistors in 2D Transition Metal Dichalcogenide Materials
Hesameddin Ilatikhameneh,Yaohua Tan,Bozidar Novakovic,Gerhard Klimeck,Rajib Rahman,Joerg Appenzeller +5 more
TL;DR: In this paper, the performance of tunnel field effect transistors (TFETs) based on two-dimensional Transition Metal Dichalcogenide (TMD) materials is investigated by atomistic quantum transport simulations.
Journal ArticleDOI
A Novel PNPN-Like Z-Shaped Tunnel Field- Effect Transistor With Improved Ambipolar Behavior and RF Performance
TL;DR: In this paper, a Z-shaped (ZS)-TFET was proposed to suppress the ambipolar behavior and improve RF performance in tunnel field effect transistors (TFETs), and the proposed ZS-TFET is more scalable than other vertical band-to-band-based TFETs.
Journal ArticleDOI
Drain Work Function Engineered Doping-Less Charge Plasma TFET for Ambipolar Suppression and RF Performance Improvement: A Proposal, Design, and Investigation
TL;DR: In this article, a doping-less charge plasma tunnel FET (TFET) was proposed for suppression of ambipolar nature with improved high-frequency figures of merit, where the drain electrode was separated into two sections of high and low work functions.
Journal ArticleDOI
Dielectric and work function engineered TFET for ambipolar suppression and RF performance enhancement
TL;DR: In this article, a novel approach to suppress the ambipolar behavior and enhance RF parameters is proposed for the first time, which combines gate dielectric and gate material work function engineering.
References
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Journal ArticleDOI
Tunnel field-effect transistors as energy-efficient electronic switches
Adrian M. Ionescu,Heike Riel +1 more
TL;DR: Tunnels based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal–oxide–semiconductor transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.
Journal ArticleDOI
Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits
TL;DR: Channel engineering techniques including retrograde well and halo doping are explained as means to manage short-channel effects for continuous scaling of CMOS devices and different circuit techniques to reduce the leakage power consumption are explored.
Journal ArticleDOI
Tunneling Field-Effect Transistors (TFETs) With Subthreshold Swing (SS) Less Than 60 mV/dec
TL;DR: In this paper, a 70-nm n-channel tunneling field effect transistor (TFET) with sub-threshold swing (SS) of 52.8 mV/dec at room temperature was demonstrated.
Journal ArticleDOI
Low-Voltage Tunnel Transistors for Beyond CMOS Logic
Alan Seabaugh,Qin Zhang +1 more
TL;DR: This review introduces and summarizes progress in the development of the tunnel field- effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges.
Journal ArticleDOI
Double-Gate Tunnel FET With High- $\kappa$ Gate Dielectric
Kathy Boucart,Adrian M. Ionescu +1 more
TL;DR: In this article, a double-gate tunnel field effect transistor (DG tunnel FET) with a high-kappa gate dielectric was proposed and validated using realistic design parameters, showing an on-current as high as 0.23 mA for a gate voltage of 1.8 V, an off-current of less than 1 fA (neglecting gate leakage), an improved average sub-threshold swing of 57 mV/dec, and a minimum point slope of 11 mV /dec.
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