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Proceedings ArticleDOI

First Demonstration of Dynamic Characteristics for SiC Superjunction MOSFET Realized using Multi-epitaxial Growth Method

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TLDR
In this article, a 1.2 kV-class superjunction (SJ) UMOSFET was realized using a multi-epitaxial growth method.
Abstract
A 1.2 kV-class superjunction (SJ) UMOSFET was realized using a multi-epitaxial growth method. The dynamic characteristics were characterized, and the potential of a product level device was identified for the first time. The switching characteristics with Schottky barrier diode showed no degradation in spite of the large drain-source capacitance (C DS ). The reverse recovery characteristics of the body diode exhibited a soft recovery which may originate from the large C DS and the short lifetime of minority carrier. A high short circuit capability comparable to a non-SJ device was demonstrated.

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Citations
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Journal ArticleDOI

Emerging GaN technologies for power, RF, digital, and quantum computing applications: Recent advances and prospects

TL;DR: In this article, the authors provide a glimpse of future GaN device technologies and advanced modeling approaches that can push the boundaries of these applications in terms of performance and reliability, which is a key missing piece to realize the full GaN platform with integrated digital, power, and RF electronics technologies.
Journal ArticleDOI

(Ultra)Wide-Bandgap Vertical Power FinFETs

TL;DR: A comprehensive tutorial and review of the background and recent advances in widebandgap and ultrawide-bandgap (UWBG) vertical power FinFETs is provided in this article.
Journal ArticleDOI

1.2-kV Vertical GaN Fin-JFETs: High-Temperature Characteristics and Avalanche Capability

TL;DR: In this paper, the authors describe the high-temperature performance and avalanche capability of normally-off 1.2-K V-class vertical gallium nitride (GaN) fin-channel junction field effect transistors (Fin-JFETs).
Journal ArticleDOI

Multidimensional device architectures for efficient power electronics

TL;DR: A review of multidimensional device architectures for power electronics can be found in this article , where the performance limits, scaling and material figure of merits of the different architectures are discussed.
Journal ArticleDOI

Design and Simulation of GaN Superjunction Transistors With 2-DEG Channels and Fin Channels

TL;DR: In this paper, the design and simulation of GaN superjunction transistors with 2-DEG and fin channels were demonstrated, i.e., a super junction current-aperture vertical electron transistor (SJ-CAVET) and a super-unction fin field-effect-transistor (sJ-FinFET) with a breakdown voltage over 2.2 kV and a specific on-resistance of $0.35
References
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Journal ArticleDOI

Theory of Semiconductor Superjunction Devices

TL;DR: In this article, a new theory of semiconductor devices, called "semiconductor superjunction (SJ) theory", is presented, which utilizes a number of alternately stacked, p-and n-type, heavily doped, thin semiconductor layers.
Proceedings ArticleDOI

High performance SiC trench devices with ultra-low ron

TL;DR: In this article, the authors have developed SiC trench structure Schottky diodes and SiC double-trench MOSFETs to improve device performance by reducing the electric field through the introduction of the aforementioned trench structures.
Proceedings ArticleDOI

First experimental demonstration of SiC super-junction (SJ) structure by multi-epitaxial growth method

TL;DR: In this article, a super junction (SJ) device has been developed to improve the trade-off relationship between the breakdown voltage and specific on-resistance in unipolar devices, and two types of test elemental groups (TEGs) were formed on the same wafer for evaluation of V====== BDcffff and the specific resistivity of the drift layer.
Journal ArticleDOI

0.97 mΩcm 2 /820 V 4H-SiC super junction V-groove trench MOSFET

TL;DR: In this article, a Super Junction (SJ) V-groove trench MOSFET was fabricated and demonstrated a low specific on-resistance (R on A) of 0.97 mΩcm2 and a blocking voltage (V b ) of 820 V.
Proceedings ArticleDOI

Fabrication of high aspect ratio doping region by using trench filling of epitaxial Si growth

TL;DR: In this paper, a new trench filling epitaxial Si growth process has been proposed for the high aspect ratio doping region, which realizes the reducing void size in the trench compared with a conventional Si process.
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