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Journal ArticleDOI

Low Voltage, Low Power, Inverter-Based Switched-Capacitor Delta-Sigma Modulator

Youngcheol Chae, +1 more
- 27 Jan 2009 - 
- Vol. 44, Iss: 2, pp 458-472
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TLDR
An inverter-based SC circuit and its application to low-voltage, low-power delta-sigma (DeltaSigma) modulators is proposed and the prototype DeltaSigma modulators achieved high power efficiency maintaining sufficient performances for practical applications.
Abstract
An operational transconductance amplifier (OTA) is a major building block and consumes most of the power in switched-capacitor (SC) circuits, but it is difficult to design low-voltage OTAs in scaled CMOS technologies. Instead of using an OTA, this paper proposes an inverter-based SC circuit and its application to low-voltage, low-power delta-sigma (DeltaSigma) modulators. Detailed analysis and design optimizations are also provided. Three inverter-based DeltaSigma modulators are implemented for an implantable pacemaker, a CMOS image sensor, and an audio codec. The modulator-I for an implantable pacemaker achieves 65-dB peak-SNDR for 120-Hz bandwidth consuming 0.73 muW with 1.5 V supply. The modulator-II for a CMOS image sensor implemented with 320-channel parallel ADC architecture achieves 63-dB peak-SNDR for 8-kHz bandwidth consuming 5.6 muW for each channel with 1.2-V supply. The modulator-III for an audio codec achieves 81-dB peak-SNDR with 20-kHz bandwidth consuming 36 muW with 0.7-V supply. The prototype DeltaSigma modulators achieved high power efficiency maintaining sufficient performances for practical applications.

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Citations
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Journal ArticleDOI

Sigma-Delta Modulators: Tutorial Overview, Design Guide, and State-of-the-Art Survey

TL;DR: A review of the state of the art on nanometer CMOS implementations is described, giving a survey of cutting-edge ΣΔ architectures, with emphasis on their application to the next generation of wireless telecom systems.
Journal ArticleDOI

A CMOS Temperature Sensor With a Voltage-Calibrated Inaccuracy of $\pm$ 0.15 $ ^{\circ}$ C (3 $\sigma$ ) From $-$ 55 $^{\circ}$ C to 125 $^{\circ}$ C

TL;DR: This paper describes the design of a low power, energy-efficient CMOS smart temperature sensor intended for RFID temperature sensing that employs an energy- efficient 2nd-order zoom ADC, which combines a coarse 5-bit SAR conversion with a fine 10-bit ΔΣ conversion.
Journal ArticleDOI

A 2.1 M Pixels, 120 Frame/s CMOS Image Sensor With Column-Parallel $\Delta \Sigma$ ADC Architecture

TL;DR: A 2.1 M pixel, 120 frame/s CMOS image sensor with column-parallel delta-sigma (ΔΣ) ADC architecture with second-order ΔΣ ADC improves the conversion speed while reducing the random noise (RN) level as well.
Journal ArticleDOI

Ring amplifiers for switched-capacitor circuits

TL;DR: In this paper the fundamental concept of ring amplification is introduced, and a basic operational theory is established, and the core benefits of this technique are identified.
Proceedings ArticleDOI

A 2.1Mpixel 120frame/s CMOS image sensor with column-parallel ΔΣ ADC architecture

TL;DR: A column-parallel ADC architecture is the most widely used ADC in CMOS image sensors for high-speed and low-power operation and delta-sigma (ΔΣ) ADCs are applied for low-speed imaging with large pixel pitch.
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