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Phase change memory technology

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TLDR
In this article, the authors survey the current state of phase change memory (PCM), a nonvolatile solid-state memory technology built around the large electrical contrast between the highly resistive amorphous and highly conductive crystalline states in so-called phase change materials.
Abstract
The authors survey the current state of phase change memory (PCM), a nonvolatile solid-state memory technology built around the large electrical contrast between the highly resistive amorphous and highly conductive crystalline states in so-called phase change materials. PCM technology has made rapid progress in a short time, having passed older technologies in terms of both sophisticated demonstrations of scaling to small device dimensions, as well as integrated large-array demonstrators with impressive retention, endurance, performance, and yield characteristics. They introduce the physics behind PCM technology, assess how its characteristics match up with various potential applications across the memory-storage hierarchy, and discuss its strengths including scalability and rapid switching speed. Challenges for the technology are addressed, including the design of PCM cells for low reset current, the need to control device-to-device variability, and undesirable changes in the phase change material that c...

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Journal ArticleDOI

Phase Change Memory

TL;DR: The physics behind this large resistivity contrast between the amorphous and crystalline states in phase change materials is presented and how it is being exploited to create high density PCM is described.
Journal ArticleDOI

NVSim: A Circuit-Level Performance, Energy, and Area Model for Emerging Nonvolatile Memory

TL;DR: NVSim is developed, a circuit-level model for NVM performance, energy, and area estimation, which supports various NVM technologies, including STT-RAM, PCRAM, ReRAM, and legacy NAND Flash and is expected to help boost architecture-level NVM-related studies.

Damascene copper electroplating for chip interconnections

TL;DR: Damascene copper electroplating for on-chip interconnections, a process that was conceived and developed in the early 1990s, makes it possible to fill submicron trenches and vias with copper without creating a void or a seam and has thus proven superior to other technologies of copper deposition as discussed by the authors.
Patent

Phase-change memory

TL;DR: In this paper, recent progress of phase change memory (PCM) is reviewed and innovations in the device structure, memory cell selector, and strategies for achieving multibit operation and 3D, multilayer high-density memory arrays are described.
References
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Book

Low-Density Parity-Check Codes

TL;DR: A simple but nonoptimum decoding scheme operating directly from the channel a posteriori probabilities is described and the probability of error using this decoder on a binary symmetric channel is shown to decrease at least exponentially with a root of the block length.
Journal ArticleDOI

Cramming More Components Onto Integrated Circuits

TL;DR: Integrated circuits will lead to such wonders as home computers or at least terminals connected to a central computer, automatic controls for automobiles, and personal portable communications equipment as mentioned in this paper. But the biggest potential lies in the production of large systems.
Journal Article

Cramming More Components onto Integrated Circuits

Gordon E. Moore
- 01 Jan 1965 - 
TL;DR: Integrated circuits will lead to such wonders as home computers or at least terminals connected to a central computer, automatic controls for automobiles, and personal portable communications equipment as discussed by the authors. But the biggest potential lies in the production of large systems.
Journal ArticleDOI

Error detecting and error correcting codes

TL;DR: The author was led to the study given in this paper from a consideration of large scale computing machines in which a large number of operations must be performed without a single error in the end result.
Journal ArticleDOI

Channel coding with multilevel/phase signals

TL;DR: A coding technique is described which improves error performance of synchronous data links without sacrificing data rate or requiring more bandwidth by channel coding with expanded sets of multilevel/phase signals in a manner which increases free Euclidean distance.
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