Proceedings ArticleDOI
Room temperature double gate single electron transistor based standard cell library
Mohamed Amine Bounouar,A. Beaumont,Khalil El Hajjam,Francis Calmon,Dominique Drouin +4 more
- pp 146-151
TLDR
A family of digital logic cells based on double gate metallic SET working at room temperature and an evaluation of the performances characteristics in terms of power consumption and delay is detailed.Abstract:
Single Electron Transistors have the potential to be a very promising candidate for future computing architectures due to their low voltage operation and low power consumption. In this paper, we present a family of digital logic cells based on double gate metallic SET working at room temperature. An evaluation of the performances characteristics in terms of power consumption and delay is detailed.read more
Citations
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Journal ArticleDOI
SET logic driving capability and its enhancement in 3-D integrated SET-CMOS circuit
TL;DR: This work examines a circuit composed of 2^1^3 SET inverters with its interconnect effect in a 3-D CMOS IC and simulates the efficiency of a SET circuit to study the SET logic drivability in a SET-only circuit.
Journal ArticleDOI
Single-electron transistor: review in perspective of theory, modelling, design and fabrication
TL;DR: The extensive literature review and thereafter execution of varying analyses reveal that the SET is a potential nano-device for futuristic applications.
Journal ArticleDOI
Tunnel Junction Engineering for Optimized Metallic Single-Electron Transistor
Khalil El Hajjam,Mohamed Amine Bounouar,Nicolas Baboux,Serge Ecoffey,Marc Guilmain,Etienne Puyoo,Laurent Francis,Abdelkader Souifi,Dominique Drouin,Francis Calmon +9 more
TL;DR: In this article, an engineered single-electron transistor (SET) based on multidielectric stacking was proposed to insure high-ON current, low-OFF current, and low capacitance.
Dissertation
Transistors mono-electroniques double-grille : Modélisation, conception and évaluation d’architectures logiques
TL;DR: In this article, the authors propose to use the double-grille metalliques (DG-SETs) of the transistors mono-electroniques (SET) to evaluate the robustness of the circuits logiques numeriques.
Implementing Medical Technological Equipment in the OR : Factors for Successful Implementations, review article
TL;DR: In this article, the authors identify success factors for effective implementations of new technologies and technological equipment in ORs, based on a systematic literature review, and argue that aligning the identified influencing factors during implementation impacts the success, adaptation, and safe use of new technological equipment, and thus the outcome of an implementation.
References
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Journal ArticleDOI
Single-electron devices and their applications
TL;DR: In this paper, the basic physics of single-electron devices, as well as their current and prospective applications are reviewed, and some byproduct ideas which may revolutionize random access memory and digital-data-storage technologies are presented.
Journal ArticleDOI
Complementary digital logic based on the ``Coulomb blockade''
TL;DR: In this article, the Coulomb blockade was used to block all tunnel events near zero bias voltage in series arrays of ultrasmall junctions, an effect that has come to be known as the ‘Coulomb blockade.
Journal ArticleDOI
Analytical modeling of single electron transistor for hybrid CMOS-SET analog IC design
TL;DR: In this paper, a physically based analytical single electron transistor (SET) model is proposed for hybrid CMOS-SET analog circuit simulation, and the model parameters are physical device parameters and an associated parameter extraction procedure is reported.