Proceedings ArticleDOI
Stacked gate dielectrics with TaO for future CMOS technologies
I.C. Kizilyaili,P.K. Roy,Frieder H. Baumann,R.Y. Huang,D. Hwang,C. Chacon,R. Irwin,Y. Ma,G. Alers +8 more
- pp 216-217
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TLDR
In this article, a SiO/sub 2/Ta/Sub 2/O/Sub 5/SiO/ Sub 2/ O/sub 5/ stacked dielectric was proposed to solve the problem of high interface trap states and low silicon interface carrier mobility.Abstract:
Summary form only given. Advances in lithography and thinner SiO/sub 2/ gate oxides have enabled the scaling of MOS (metal-oxide-semiconductor) technologies to sub-0.25 /spl mu/m feature size. High dielectric constant materials, such as Ta/sub 2/O/sub 5/, have been suggested as a substitute for SiO/sub 2/ as the gate material beyond t/sub ox/=25 /spl Aring/. However, the Si-Ta/sub 2/O/sub 5/ material system suffers from unacceptable levels of bulk fixed charge, high density of interface trap states, and low silicon interface carrier mobility. We present a solution to these issues through the synthesis of a SiO/sub 2/-Ta/sub 2/O/sub 5/-SiO/sub 2/ stacked dielectric. The fabricated transistors exhibit excellent I-V characteristics.read more
Citations
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Journal ArticleDOI
The future of wires
R. Ho,Ken Mai,Mark Horowitz +2 more
TL;DR: Wires that shorten in length as technologies scale have delays that either track gate delays or grow slowly relative to gate delays, which is good news since these "local" wires dominate chip wiring.
Journal ArticleDOI
The impact of high-/spl kappa/ gate dielectrics and metal gate electrodes on sub-100 nm MOSFETs
Baohong Cheng,Min Cao,R. Rao,A. Inani,P. Vande Voorde,Wayne Greene,J.M.C. Stork,Zhiping Yu,P.M. Zeitzoff,Jason C. S. Woo +9 more
TL;DR: In this paper, the potential impact of high/spl kappa/ gate dielectrics on device short-channel performance is studied over a wide range of dielectric permittivities using a two-dimensional (2D) simulator implemented with quantum mechanical models.
Proceedings ArticleDOI
CMOS metal replacement gate transistors using tantalum pentoxide gate insulator
Amitava Chatterjee,Richard A. Chapman,Keith A. Joyner,M. Otobe,Sunil V. Hattangady,M. J. Bevan,George A. Brown,H. Yang,Q. He,D. Rogers,S.J. Fang,Robert Kraft,Antonio L. P. Rotondaro,M. Terry,K. Brennan,S. Aur,J.C. Hu,H.-L. Tsai,P.J. Jones,G. Wilk,M. Aoki,Mark S. Rodder,Ih-Chin Chen +22 more
TL;DR: In this paper, a full CMOS process using a combination of a TiN/W Metal Replacement Gate Transistor design with a high dielectric constant gate insulator of tantalum pentoxide over thin remote plasma nitrided gate oxide was reported.
Patent
MOS-type semiconductor device and method for making same
TL;DR: In this article, the MOS-type semiconductor devices of the invention are described and methods for forming such devices are presented. But they do not specify the exact arrangement of the semiconductors.
Journal ArticleDOI
Improvement of threshold voltage deviation in damascene metal gate transistors
Atsushi Yagishita,Tomohiro Saito,Kazuaki Nakajima,Seiji Inumiya,K. Matsuo,Tsuyoshi Shibata,Y. Tsunashima,K. Suguro,Tsunetoshi Arikado +8 more
TL;DR: In this paper, the work function deviation (crystal orientation deviation) was found to cause the threshold voltage deviation (/spl Delta/V/sub th/) in the damascene metal gate transistors.
References
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Journal ArticleDOI
Fabrication and characterization of Si-MOSFET's with PECVD amorphous Ta 2 O 5 gate insulator
TL;DR: In this article, a p-channel Al gate transistor with amorphous Ta/sub 2/O/sub 5/ insulator gates was fabricated using a low pressure (a few mtorr) plasma-enhanced CVD process in a microwave (2.45 GHz) excited electron cyclotron resonance reactor.
Journal ArticleDOI
High electric fields in silicon dioxide produced by corona charging
R. Williams,M. H. Woods +1 more
TL;DR: In this article, high electric fields were applied to films of SiO2 thermally grown on silicon, and the surface potential was measured using a vibrating capacitor plate mounted near the free surface.
Journal ArticleDOI
Reduction of current leakage in chemical-vapor deposited Ta 2 O 5 thin-films by oxygen-radical annealing [DRAM dielectric]
TL;DR: In this paper, the electrical properties of CVD-Ta/sub 2/O/sub 5/ thin-films are improved by post-deposition oxygen-radical annealing.
Proceedings ArticleDOI
Ultra-thin Ta/sub 2/O/sub 5/SiO/sub 2/ gate insulator with TiN gate technology for 0.1/spl mu/m MOSFETs
TL;DR: Ta205/Si02 gate insulator with a TIN gate electrode technology was proposed in this paper, which achieved high drive current and stable operation for the first time by using a poly-Si electrode.
Journal ArticleDOI
Current drive enhancement by using high-permittivity gate insulator in SOI MOSFET's and its limitation
H. Shimada,Tadahiro Ohmi +1 more
TL;DR: In this paper, speed enhancement effects by using a high-permittivity gate insulator in SOI MOSFETs and its limitation were investigated by a two-dimensional device simulator and circuit simulator.