Journal ArticleDOI
Temperature sensors and voltage references implemented in CMOS technology
TLDR
It is shown that bipolar substrate transis- tors are very suited to be applied to generate the basic and PTAT voltages and dynamic element matching and auto-calibration can solve the problems related to mismatching of components and noise.Abstract:
This paper reviews the concepts, opportunities and limitations of temperature sensors and voltage references realized in CMOS technology. It is shown that bipolar substrate transis- tors are very suited to be applied to generate the basic and PTAT voltages. Furthermore, it is shown that dynamic element matching and auto-calibration can solve the problems related to mismatching of components and noise. The effects of mechan- ical stress are a major source of inaccuracy. In CMOS technology, the mechanical-stress effects are small, as compared to those in bipolar technology. It is concluded that, with low-cost CMOS tech- nolog, rather accurate voltage references and temperature sensors can be realized.read more
Citations
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Journal ArticleDOI
An Electrical Model for Nanometer CMOS Device Stress Effect in Design and Simulation of Analog Reference Circuits
Dong Wang,Pak Kwong Chan +1 more
TL;DR: A new electrical-based stress model is presented that addresses the stress effect in the nanometer CMOS devices and provides a random stress-induced offset that can be significantly reduced if the simplified dynamic element matching technique is applied in the reference circuit design.
Journal ArticleDOI
A low power, miniature temperature sensor with one-point calibrated accuracy of ± 0.25 °C from − 55 to 125 °C in 65 nm CMOS process
TL;DR: In this paper, an ultra-low power and area, CMOS based temperature sensor with digital interface for military application (−55 to 125°C) is introduced, which employs a proportional to absolute temperature current generator operating in sub-threshold region, and a novel signal-conditioning circuitry.
Proceedings ArticleDOI
A CMOS based µ-power smart temperature sensor for ON-chip thermal monitoring
TL;DR: A low-power smart temperature-sensor has developed using a standard 0.18μm CMOS process technology that utilizes the dependency of the rising time of the output pulse of an inverter, on the drain current when triggered by a fixed frequency square wave signal.
Proceedings ArticleDOI
A 11 µW 0°C–160°C temperature sensor in 90 nm CMOS for adaptive thermal monitoring of VLSI circuits
TL;DR: The prototype temperature sensor with un-calibrated 3σ accuracy within a 0°C-160°C temperature range has been fabricated in standard single poly, six metal 90nm CMOS, consumes only 11μW at 1V power supply and measures 0.05mm2.
Book ChapterDOI
Thermal monitoring of IC’s
Josep Altet,Antonio Rubio +1 more
TL;DR: In this paper, the authors classify the main measuring methods into three domains: optical, mechanical or built-in temperature sensors, depending on the way in which the measurement is taken.
References
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An integral charge control model of bipolar transistors
H.K. Gummel,H. C. Poon +1 more
TL;DR: A compact model of bipolar transistors suitable for network analysis computer programs is presented, through the use of a new charge control relation linking junction voltages, collector current, and base charge, which substantially exceeds that of existing models of comparable complexity.
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Thermal sensors based on transistors
TL;DR: In this article, the authors present various methods of utilizing bipolar transistors and integrated circuits as temperature transducers and compare the accuracy, stability and calibration problems of different transducers compared with each other.
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A CMOS voltage reference
Yannis Tsividis,R.W. Ulmer +1 more
TL;DR: A method for developing a reference voltage in CMOS integrated circuits is described, and the principle of the suggested voltage reference is explained and the final implementation is presented.
Journal ArticleDOI
A new NMOS temperature-stable voltage reference
TL;DR: In this paper, an NMOS voltage reference was developed that exhibits extremely low drift with temperature, which is based on the difference between the gate/source voltages of enhancement and depletion-mode NMOS transistors.