scispace - formally typeset
Search or ask a question

Showing papers on "Capacitance published in 2001"



Patent
21 May 2001
TL;DR: In this article, a non-contact type user input device is provided with a plurality of linear transmission electrodes, a transmitter supplying an AC current for transmission to the respective transmission electrodes and a receiver receiving the AC current flowing through the reception electrodes.
Abstract: PROBLEM TO BE SOLVED: To recognize the information of two or more points and the shape of an approaching object. SOLUTION: A non-contact type user input device is provided with a plurality of linear transmission electrodes, a transmitter supplying an AC current for transmission to the respective transmission electrodes, a plurality of linear reception electrodes arranged so as not to be in contact with the respective transmission electrodes and a receiver receiving the AC current flowing through the reception electrodes. A capacitor is formed at each intersection of the transmission electrode and the reception electrode, a parallel capacitor is formed corresponding to the approach of the fingertip of a user and the capacitance of the capacitor changes corresponding to the approaching degree of the fingertip. Recognition is performed by utilizing the change of the AC current passing through the capacitor between the electrodes.

780 citations


Journal ArticleDOI
TL;DR: In this article, a self-organizing diblock copolymer system with semiconductor processing is combined to produce silicon capacitors with increased charge storage capacity over planar structures.
Abstract: We combine a self-organizing diblock copolymer system with semiconductor processing to produce silicon capacitors with increased charge storage capacity over planar structures. Our process uses a diblock copolymer thin film as a mask for dry etching to roughen a silicon surface on a 30 nm length scale, which is well below photolithographic resolution limits. Electron microscopy correlates measured capacitance values with silicon etch depth, and the data agree well with a geometric estimate. This block copolymer nanotemplating process is compatible with standard semiconductor processing techniques and is scalable to large wafer dimensions.

423 citations


Journal ArticleDOI
TL;DR: In this article, an exact equivalent circuit including terminal parts, which takes account of electrical and chemical control parameters in a unified way, is derived for a cell with a mixed conductor (or electrolyte) without internal sources or sinks.
Abstract: An exact equivalent circuit including terminal parts, which takes account of electrical and chemical control parameters in a unified way, is derived for a cell with a mixed conductor (or electrolyte) without internal sources or sinks. In one-dimensional problems electrochemical kinetics can be mapped by two-dimensional circuits exhibiting the spatial and the thermodynamic displacement as two independent coordinates. One main advantage of the exact circuits with respect to the underlying differential equations is the ability to simplify the description according to specific situations. As we show in several examples in the second part of the paper, it is straightforward to select the elements relevant for the particular experimental conditions and so to make appropriate approximations. This is most helpful for the description of electrochemical systems, such as fuel cells, membranes, pumps and batteries.

407 citations


Patent
22 Feb 2001
TL;DR: In this paper, a conformal capacitor dielectric over textured silicon electrodes for integrated memory cells is presented, where the first electrodes include hemispherical grain (HSG) silicon for increasing the capacitor plate surface area.
Abstract: Method and structures are provided for conformal capacitor dielectrics over textured silicon electrodes for integrated memory cells. Capacitor structures and first electrodes or plates are formed above or within semiconductor substrates. The first electrodes include hemispherical grain (HSG) silicon for increasing the capacitor plate surface area. The HSG topography is then exposed to alternating chemistries to form monolayers of a desired dielectric material. Exemplary process flows include alternately pulsed metal organic and oxygen source gases injected into a constant carrier flow. Self-terminated metal layers are thus reacted with oxygen. Near perfect step coverage allows minimal thickness for a capacitor dielectric, given leakage concerns for particular materials, thereby maximizing the capacitance for the memory cell and increasing cell reliability for a given memory cell design. Alternately pulsed chemistries are also provided for depositing top electrode materials with continuous coverage of capacitor dielectric, realizing the full capacitance benefits of the underlying textured morphology.

399 citations


Patent
06 Dec 2001
TL;DR: In this paper, a transducer consisting of an electroactive polymer in electrical communication with at least two electrodes was proposed. But the transducers were not designed for wireless communication.
Abstract: The invention provides sensors that comprise a transducer that converts between mechanical energy and electrical energy. The transducer comprises an electroactive polymer in electrical communication with at least two electrodes. When a relatively small voltage difference is applied between the electrodes, deflection of the polymer results in a measurable change in electrical energy for the transducer. The change in electrical energy may correspond to a change in resistance, capacitance, or a combination thereof. Sensing electronics circuits in electrical communication with electrodes detect the electrical energy change.

379 citations


Journal ArticleDOI
Yuan Taur1
TL;DR: In this paper, a 1D analytic solution for symmetric and asymmetric double-gate MOSFETs was derived by incorporating only the mobile charge term in Poisson's equation.
Abstract: A one-dimensional (1-D) analytic solution is derived for an undoped (or lightly doped) double-gate (DG) MOSFET by incorporating only the mobile charge term in Poisson's equation. The solution is applied to both symmetric and asymmetric DG MOSFETs to obtain closed forms of band bending and inversion charge as a function of gate voltage and silicon thickness. It is shown that for the symmetric DG device, "volume inversion" only occurs under subthreshold conditions, with a slightly negative impact on performance. Comparisons under the same off-state conditions show that the on-state inversion charge density of an asymmetric DG with one channel is only slightly less than that of a symmetric DG with two channels, if the silicon film is thin. From the analytic solutions, explicit expressions for the various components of the equivalent capacitance circuit are derived for symmetric and asymmetric DG devices. These help gain an insight into the electrostatic coupling between the back gate and the front channel in the asymmetric case. Finally, the gate work function requirements are quantified for symmetric and asymmetric DG CMOS, based on threshold voltage considerations.

357 citations


Journal ArticleDOI
TL;DR: In this article, various kinds of activated carbon/activated carbon fibers were used in the evaluation of electrical double layer capacitors using the method of image analysis, and the appropriate hydrated ion structures in an aqueous system of H 2 SO 4 /H 2 O and an organic system of LiClO 4 /polypropylene carbonate were calculated using the software Cerius 2 (ver. 3.8).
Abstract: Various kinds of activated carbon/activated carbon fibers were used in the evaluation of electrical double layer capacitors using the method of image analysis. The appropriate hydrated ion structures in an aqueous system of H 2 SO 4 /H 2 O and an organic system of LiClO 4 /polypropylene carbonate were calculated using the software Cerius 2 (ver. 3.8). The capacitance obtained varied with the electrolyte used, even though the capacitor material remained the same. The relationship between the pore size and the electrolyte ion diameter is discussed.

310 citations


Journal ArticleDOI
TL;DR: In this article, an absolute wireless pressure sensor that consists of a capacitive sensor and a gold-electroplated planar coil is presented, where applied pressure deflects a 6-μm-thin silicon diaphragm, changing the capacitance formed between it and a metal electrode supported on a glass substrate.
Abstract: This paper reports the development of an absolute wireless pressure sensor that consists of a capacitive sensor and a gold-electroplated planar coil. Applied pressure deflects a 6 μm-thin silicon diaphragm, changing the capacitance formed between it and a metal electrode supported on a glass substrate. The resonant frequency of the LC circuit formed by the capacitor and the inductor changes as the capacitance changes; this change is sensed remotely through inductive coupling, eliminating the need for wire connection or implanted telemetry circuits. The sensor is fabricated using the dissolved-wafer process and utilizes a boron-doped silicon diaphragm supported on an insulating glass substrate. The complete sensor measures 2.6 mm ×1.6 mm in size and incorporates a 24-turns gold-electroplated coil that has a measured inductance of 1.2 μH. The sensor is designed to provide a resonant frequency change in the range 95–103 MHz for a pressure change in the range 0–50 mmHg with respect to ambient pressure, providing a pressure responsivity and sensitivity of 160 kHz/mmHg and 1553 ppm/mmHg, respectively. The measured pressure responsivity and sensitivity of the fabricated device are 120 kHz/mmHg and 1579 ppm/mmHg, respectively.

276 citations


Journal ArticleDOI
TL;DR: In this article, the pull-in phenomenon of a general electrostatic actuator with a single input is represented by an algebraic equation referred to as the pullin equation, which can be used to analyze a wide range of nonlinear mechanical effects as well as various nonlinear, nonideal, and parasitic electrical effects.
Abstract: This paper presents a generalized model for the pull-in phenomenon in electrostatic actuators with a single input, either charge or voltage. The pull-in phenomenon of a general electrostatic actuator with a single input is represented by an algebraic equation referred to as the pull-in equation. This equation directly yields the pull-in parameters, namely, the pull-in voltage or pull-in charge and the pull-in displacement. The model presented here permits the analysis of a wide range of cases, including nonlinear mechanical effects as well as various nonlinear, nonideal, and parasitic electrical effects. In some of the cases, an analytic solution is derived, which provides physical insight into how the pull-in parameters depend upon the design and properties of the actuator. The pull-in equation can also yield rapid numerical solutions, allowing interactive and optimal design. The model is then utilized to analyze analytically the case of a Duffing spring, previously analyzed numerically by Hung and Senturia, and captures the variations of the pull-in parameters in the continuum between a perfectly linear spring and a cubic spring. Several other case studies are described and analyzed using the pull-in equation, including parallel-plate and tilted-plate (torsion) actuators taking into account the fringing field capacitance, feedback and parasitic capacitance, trapped charges, an external force, and large displacements.

239 citations


Journal ArticleDOI
TL;DR: In this paper, the first report of impedance technique run on single particle electrodes with the aim of clarifying its electronic and ionic transport properties was presented, which was successfully conducted on a particle of 15 μm diam resulting in impedance magnitude on the order of MΩ.
Abstract: This is the first report of impedance technique run on single particle electrodes with the aim of clarifying its electronic and ionic transport properties. Measurements were successfully conducted on a particle of 15 μm diam resulting in impedance magnitude on the order of MΩ. The impedance spectra exhibited (i) one semicircle in the high frequency region, (ii) Warburg impedance in low frequencies, and finally, (iii) a limiting capacitance in the very low frequencies. The spectra were analyzed using a modified Randles-Ershler circuit, so that the reaction kinetics could be precisely evaluated. The charge transfer resistance decreased as the potential increased, whereas the double layer capacitance was almost invariant with the potential. Thus, the apparent chemical diffusion coefficient of lithium ions was determined to be to as function of electrode potential. These results are in agreement with those obtained by potential step chronoamperometry technique. © 2001 The Electrochemical Society. All rights reserved.

Patent
Mark W. Casebolt1, Gino Garcia1
26 Nov 2001
TL;DR: Capacitive proximity sensing is carried out by detecting a relative change in the capacitance of a “scoop” capacitor formed by a conductor and a surrounding ground plane as mentioned in this paper.
Abstract: Capacitive proximity sensing is carried out by detecting a relative change in the capacitance of a “scoop” capacitor formed by a conductor and a surrounding ground plane. The conductor may be a plate provided in the form of an adhesive label printed with conductive ink. Charge is transferred between the “scoop” capacitor and a relatively large “bucket” capacitor, and a voltage of the bucket capacitor is applied to an input threshold switch. A state transition (e.g., from low to high, or high to low) of the input threshold switch is detected and a value (TouchVal) indicative of a number of cycles of charge transfer required to reach the state transition is determined. The presence or absence of an object or body portion in close proximity to or contact with a device can be determined by comparing TouchVal with a predetermined threshold value (TouchOff). TouchOff can be adjusted to take into account environmentally induced (non-touch related) changes in the capacitance of the scoop capacitor. Power management is provided in a user operated data input device utilizing proximity sensing and switching between three or more power states. Switching between the power states occurs based upon the presence or absence of input activity, and an operation instrumentality (e.g., a hand) in close proximity to or contact with the device. In an optical surface tracking cursor control device embodiment, switching to and from a BEACON state, which provides a reduced flash rate of a surface illuminating light source, is carried out based upon a detected presence or absence of a trackable surface.

Patent
Thomas J. Aton1
23 Aug 2001
TL;DR: In this paper, metal interconnect structures are used to form the capacitor, and the interdigitated fingers of like polarity within the interconnect structure are connected above and below to one another by metal vias to form a wall of metal which increases total capacitance by taking advantage of the via sidewall capacitance.
Abstract: An on-chip analog capacitor. Metal interconnect structures are used to form the capacitor, and the interdigitated fingers of like polarity within the interconnect structure are connected above and below to one another by metal vias to form a wall of metal which increases total capacitance by taking advantage of the via sidewall capacitance.

Journal ArticleDOI
TL;DR: In this paper, the cyclic voltammetry behavior of de Levie type wire brush electrodes as models for porous electrodes, in comparison with that of single wire electrodes of the same metal, was examined under similar conditions in relation to the current response profiles of a 5 RC element hardware model circuit.

Book
01 Jan 2001
TL;DR: In this paper, the authors present a history of single-electron theory and its application in circuit design, including the following: 1.1.1 Single-electronics - made easy. 2.2 Influence of the Electromagnetic Environment. 3.2.
Abstract: 1 Introduction.- 1.1 Single-Electronics - Made Easy.- 1.2 A Historical Look Back.- 2 Theory.- 2.1 Orthodox Single-Electron Theory.- 2.1.1. Thermodynamic Formulation.- 2.2 Time and Space Correlations.- 2.3 Master Equation of Electron Transport.- 2.4 Extensions to the Orthodox Theory.- 2.4.1 Cotunneling.- 2.4.2 Influence of the Electromagnetic Environment.- Quantum Langevin Theory.- Phase Correlation Theory.- 2.4.3 Different Materials - Different Density of States.- Discrete Energy Levels.- 2.4.4 Superconducting Tunnel Junctions.- Quasiparticle Tunneling.- Parity Effect.- Andreev Reflections.- Coherent Cooper Pair Tunneling.- 2.4.5 Self-Heating.- 2.4.6 Image Charge.- 3 Simulation Methods and Numerical Algorithms.- 3.1 Monte Carlo Method.- 3.1.1 Time-Dependent Tunnel Rates.- 3.1.2 Deterministic Model.- 3.1.3 Random Numbers.- Linear Congruential Generators.- Lagged Fibonacci or Shift Register Generators.- Inverse Congruential Generators.- Resolution Limit for Rare Tunnel Events.- 3.2 Solution of the Master Equation.- 3.2.1 Krylov Subspace Approximate of the Matrix Exponential Operator.- 3.2.2 Schur-Frechet Algorithm.- 3.3 Coupling with SPICE.- 3.4 Free Energy.- 3.5 Tunnel Transmission Coefficient.- 3.5.1 Analytic Solutions.- 3.5.2 Wentzel-Kramers-Brillouin Approximation.- 3.5.3 Piecewise Potential Approximation.- Three Dimensions.- Transfer Matrix versus Scattering Matrix.- Piecewise-Constant Potential Approximation.- Piecewise-Linear Potential Approximation.- 3.5.4 Finite Differences with Continued Fraction.- 3.5.5 Finite Elements.- 3.5.6 Detour via the Time-Dependent Schrodinger Equation.- Finite Differences.- Spectral Method.- 3.6 Energy Levels.- 3.6.1 Analytic Solutions.- 3.6.2 Bohr-Sommerfeld Quantization Rule.- 3.6.3 Piecewise Potential Approximation.- Transmission Line Analogy.- 3.6.4 Finite Differences with Continued Fraction.- 3.6.5 Time-Dependent Solutions.- 3.7 Evaluation Schemes for Cotunneling.- 3.8 Rate Calculation Including Electromagnetic Environment.- Network Impedance Calculation.- 3.9 Numerical Integration of Tunnel Rates.- 3.10 Time-Dependent Node Voltages and Node Charges.- 3.11 Stability Diagram and Stable States.- 3.12 Capacitance Calculations.- 3.12.1 Analytic Formulas.- 3.12.2 Capacitance of Ellipsoid, Elliptic Disc, and Circular Disc.- 3.12.3 Image Charge Method for Spheres.- Capacitance of Two Equal Spheres.- Capacitance of an Arbitrary Arrangement of Spheres 13.- Capacitance of Two Intersecting Spheres - Capacitance Inversion.- 3.12.4 Source Point Collocation Method.- 3.12.5 Stochastic Capacitance Calculation for Rectangular.- Circuits and Applications.- 4.1 Fundamental Circuits.- 4.1.1 Single-Electron Transistor.- 4.1.2 Single-Electron Turnstile.- Asymmetric Turnstile.- 4.1.3 Single-Electron Pump.- 4.1.4 Linear Array of Junctions.- 4.1.5 Two-Dimensional Array of Junctions.- 4.2 Metrology Applications.- 4.2.1 The Quantum Metrology Triangle.- 4.2.2 Electron Pump - Current Standard.- 4.2.3 Supersensitive Electrometer.- 4.2.4 Single-Electron Proximity Probe.- 4.2.5 Coulomb Blockade Thermometer.- 4.3 Memory.- 4.3.1 Single-Electron Flip-Flop.- 4.3.2 Electron Trap Memory.- 4.3.3 Ring Memory.- 4.3.4 Background-Charge-Independent Memory.- 4.3.5 Single-Island Memory.- 4.3.6 Multiple-Island Memory.- 4.3.7 T-Memory Cell.- 4.3.8 Combinatorial Access Memory.- 4.3.9 Switch-Source-Sink Memory.- 4.3.10 Negative Differential Resistance Flip-Flop.- 4.3.11 Multivalued Memory from Asymmetric Tunnel Junctions.- 4.3.12 Nanocrystal Memory.- 4.4 Logic.- 4.4.1 Transistor-like Design - Voltage State Logic.- 4.4.2 Bits by Single Electrons - Charge State Logic.- Binary-Decision Diagram.- Lattice Gas Machines.- Systolic Processors.- 4.4.3 Quantum Cellular Automata.- 4.4.4 Wireless Logic.- 4.4.5 Tunneling Phase Logic.- 4.4.6 Parametron Logic.- 4.5 Interfacing to CMOS.- 4.6 Exotic Circuits.- 4.6.1 Neuronal Networks.- 4.6.2 Boltzmann Machines.- 4.6.3 Mixed Bag.- Negative Differential Resistance.- Digital-to-Analog Converter.- Asymmetric Tunnel Barriers.- 4.7 Evolutionary Circuit Design.- 5 Random Background Charges.- 5.1 The Good Side of High Charge Sensitivity.- 5.2 Solutions on the Material Level.- 5.3 Solutions on the Device Level.- 5.3.1 Refresh for Single-Electron Logic.- 5.3.2 Coulomb Oscillations.- 5.3.3 Resistive Elements.- 5.3.4 One- and Two-Dimensional Island Structures.- 5.4 Solutions on the Circuit and System Level.- 6 Manufacturing Methods and Material Systems.- 6.1 Shadow Evaporation.- 6.2 Step-Edge Cutoff.- 6.3 Nanoimprint.- 6.4 Planar Quantum Dots.- 6.5 Scanning Probe Microscopy.- 6.6 Granular Films.- 6.7 Self-Assembled Structures.- 6.8 Outlook.- Appendixes.- A Fermi's Golden Rule.- B Capacitance and Resistance Extraction from Measured Data.- C Analytic Solutions of the Cotunneling Rate.- D Algorithms from Number Theory.- E Convex Hull of Point Set.- F Analytic Capacitance Calculation.- References.

Journal ArticleDOI
TL;DR: In this paper, the double layer capacitance versus potential plot exhibits a peak at about 0.12 V versus SCE in the 1.5-7 pH range; from here towards cathodic potentials the capacitance attains a value of about 20 μF/cm 2.

Patent
29 Oct 2001
TL;DR: In this article, an enhanced surface area electrically conductive layer for such capacitors is formed by processing a ruthenium oxide layer at high temperature at or above 500° C. and low pressure 75 torr or below, most desirably 5 tor r or below.
Abstract: Capacitors having increased capacitance include an enhanced-surface-area (rough-surfaced) electrically conductive layer or other layers that are compatible with the high-dielectric constant materials. In one approach, an enhanced-surface-area electrically conductive layer for such capacitors is formed by processing a ruthenium oxide layer at high temperature at or above 500° C. and low pressure 75 torr or below, most desirably 5 torr or below, to produce a roughened ruthenium layer having a textured surface with a mean feature size of at least about 100 Angstroms. The initial ruthenium oxide layer may be provided by chemical vapor deposition techniques or sputtering techniques or the like. The layer may be formed over an underlying electrically conductive layer. The processing may be performed in an inert ambient or in a reducing ambient. A nitrogen-supplying ambient or nitrogen-supplying reducing ambient may be used during the processing or afterwards to passivate the ruthenium for improved compatibility with high-dielectric-constant dielectric materials. Processing in an oxidizing ambient may also be performed to passivate the roughened layer. The roughened layer of ruthenium may be used to form an enhanced-surface-area electrically conductive layer. The resulting enhanced-surface-area electrically conductive layer may form a plate of a storage capacitor in an integrated circuit, such as in a memory cell of a DRAM or the like. In another approach, a tungsten nitride layer is provided as an first electrode of such a capacitor. The capacitor, or at least the tungsten nitride layer, is annealed to increase the capacitance of the capacitor.

Journal ArticleDOI
TL;DR: In this paper, the frequency dependence of PECVD nitride and LPCVD oxide metal-insulator-metal (MIM) capacitors is investigated with special attention for precision analog applications.
Abstract: The frequency dependence of PECVD nitride and LPCVD oxide metal-insulator-metal (MIM) capacitors is investigated with special attention for precision analog applications. At measurement frequencies of 1.0 MHz, nitride MIM capacitors show capacitance linearity close to that of oxide MIM capacitors, indicating potential for precision analog circuit applications. Due to dispersion effects, however, nitride MIM capacitors show significant degradation in capacitor linearity as the frequency is reduced, which leads to accuracy limitations for precision analog circuits. Oxide MIM capacitors are essentially independent of frequency.

Patent
19 Mar 2001
TL;DR: In this article, a plasma reactor has a capacitive electrode driven by an RF power source, and the electrode capacitance is matched at the desired plasma density and RF source frequency to the negative capacitance of the plasma, to provide an electrode plasma resonance supportive of a broad process window within which the plasma may be sustained.
Abstract: In accordance with one aspect of the invention, a plasma reactor has a capacitive electrode driven by an RF power source, and the electrode capacitance is matched at the desired plasma density and RF source frequency to the negative capacitance of the plasma, to provide an electrode plasma resonance supportive of a broad process window within which the plasma may be sustained.

Patent
28 Dec 2001
TL;DR: In this article, a one transistor one capacitor micromirror with DRAM memory cell built around a large polysilicon-to-substrate capacitor which is not susceptible to recombination of photo-generated carriers caused by illumination in the projector is presented.
Abstract: A one transistor one capacitor micromirror with DRAM memory cell built around a large polysilicon-to-substrate capacitor which is not susceptible to recombination of photo-generated carriers caused by illumination in the projector This large polysilicon-to-substrate capacitor overshadows the much smaller inherent parallel depletion capacitance which is sensitive to light The device is further 100% shielded from exposed light by metal layers and the address node is located under the center of the micromirror mirror to obtain maximum shielding of light for the smaller, light sensitive, depletion portion of the capacitance As a result the micromirror of this invention can adequately hold the cell charge in excess of the device load time of 300 μSec even in extremely high brightness projector applications This invention also provides a feature which automatically forces micromirror mirrors located over bad CMOS memory cell to the dark state, which is much less objectionable in most applications, thereby improving the overall effective processing yield

Journal ArticleDOI
TL;DR: A cyclic voltammetric (CV) technique was used to study the combined effects of annealing temperature and time on the pseudocapacitance of thermally treated electroprecipitated nickel hydroxide thin films as mentioned in this paper.

Journal ArticleDOI
20 Mar 2001
TL;DR: In this paper, strontium titanate oxide (SrTiO 3 ) with high dielectric constant is investigated for high switching on/off ratio and on capacitance as a dielectoric layer of a micromechanical capacitive switch.
Abstract: RF MEMS switches are newly designed and fabricated with various structural geometry of transmission line, hinge, and movable plate formed by using electroplating techniques, low temperature processes, and dry releasing techniques. In particular, strontium titanate oxide (SrTiO 3 ) with high dielectric constant is investigated for high switching on/off ratio and on capacitance as a dielectric layer of a micromechanical capacitive switch. Achieved lowest actuation voltage of the fabricated switches is 8 V. The fabricated switch has low insertion loss of 0.08 dB at 10 GHz, isolation of 42 dB at 5 GHz, on/off ratio of 600, and on capacitance of 50 pF, respectively.

Journal ArticleDOI
TL;DR: In this paper, a ruthenium oxide thin film electrode with an average specific capacitance of 650 F/g and good high rate capability was prepared by electrostatic spray deposition (ESD).
Abstract: A ruthenium oxide thin film electrode with an average specific capacitance of 650 F/g and good high rate capability was prepared by electrostatic spray deposition (ESD). This technique is a one-step process of preparing ruthenium oxide thin film electrode compared with a multistep sol-gel process and has features of low-temperature synthesis and easy control of surface morphology. While as-prepared hydrous ruthenium oxide thin film was in an amorphous phase, the hydrous ruthenium oxide thin film became crystalline after annealing at temperatures >200°C. Ruthenium oxide thin film electrode annealed at 200°C showed a cyclic voltammogram indicative of a typical capacitive behavior in 0.5 M electrolyte at a scan rate of 20 mV/s with the average specific capacitance of 650 F/g. The average specific capacitance was 640 F/g at 2 mV/s and 600 F/g at 50 mV/s, respectively, indicating that the average specific capacitance decreases only slightly with increasing scan rate. © 2001 The Electrochemical Society. All rights reserved.

Patent
26 Sep 2001
TL;DR: In this paper, the authors describe the use of conductive lines having a nonrectangular shaped cross section to reduce line capacitance for a given pitch, without increasing line-to-line capacitance.
Abstract: The invention describes the use of conductive lines having a non-rectangular shaped cross section to reduce line capacitance for a given pitch. Such conductive lines can reduce the height of integrated circuits with multi-level conductive lines without increasing line-to-line capacitance.

Journal ArticleDOI
TL;DR: In this paper, high porosity carbons prepared from mesophase pitch with KOH etching to different extents were used to fabricate electrodes for electric double-layer capacitors.
Abstract: High porosity carbons prepared from mesophase pitch with KOH etching to different extents were used to fabricate electrodes for electric double-layer capacitors. Nitrogen adsorption was used to characterize the porous structure of the carbon electrodes. The performance of the capacitors in 1 M H2SO4 was investigated with voltage sweep cyclic voltammetry and constant current charge-discharge cycling. These two electrochemical methods gave fairly close results for capacitance measurements and demonstrated that distributed capacitance along a micropore path affected the capacitor performance. The specific capacitance of the electrodes was found to increase with the specific surface area. However, the capacitance per unit carbon area showed a decreasing trend with the specific area, and this has been attributed to the increased electrode resistance that would probably result from the deepening of the pores upon etching. The highest specific capacitance of 130 F g 21 was achieved with an electrode consisting of 80% carbon powders with a specific surface area of 2860 m 2 g 21

Patent
02 Oct 2001
TL;DR: In contrast to a basal plane, the electric field along an edge plane is distorted so as to exhibit an edge effect or "fringe effect" as discussed by the authors, where at least ten percent (10%) of the overall surface area of the conductive material is an edge surface.
Abstract: The invention features an electrochemical device which includes at least two capacitor electrodes 16 , each of which includes a conductive material characterized in that at least ten percent (10%) of the overall surface area of the conductive material is an edge plane. In contrast to a basal plane, the electric field along an edge plane is distorted so as to exhibit an ‘edge effect or ‘fringe effect. Capacitor electrodes 16 with many edges, points, corners, or fractal surfaces exhibit greater capacitance per unit volume or mass amount of capacitor electrode material, than do materials in which the surface area of the material is predominately basal plane. An electrochemical device of the invention can be, for example, an electrochemical cell, e.g., a battery, a capacitor, or a flow-through capacitor.

Journal ArticleDOI
TL;DR: It was shown that dielectric permittivity, capacitance and conductivity values of the cell membrane are higher for normal lymphocytes in comparison with malignant ones.
Abstract: The aim of this paper is to present a comprehensive theoretical and experimental study by means of time domain dielectric spectrometer (TDDS) of static and dynamic dielectric properties of normal and malignant blood cells. The successful use of the TDDS method as a tool of human cell study required a special protocol and algorithms for all stages of cell preparation, measurements and data treatment. The routine developed in this study was used in the experimental analysis of nine lines of malignant, transformed and normal lymphocytes. It was shown that dielectric permittivity, capacitance and conductivity values of the cell membrane are higher for normal lymphocytes in comparison with malignant ones.

Patent
22 Jun 2001
TL;DR: In this paper, the potential of the sample solution in which the device is immersed and the device-solution interfacial capacitance is determined by the extent of occupancy of the immobilized receptor molecules by target molecules.
Abstract: Molecular recognition-based electronic sensor, which is gateless, depletion mode field effect transistor consisting of source and drain diffusions, a depletion-mode implant, and insulating layer chemically modified by immobilized molecular receptors that enables miniaturized label-free molecular detection amenable to high-density array formats. The conductivity of the active channel modulates current flow through the active channel when a voltage is applied between the source and drain diffusions. The conductivity of the active channel is determined by the potential of the sample solution in which the device is immersed and the device-solution interfacial capacitance. The conductivity of the active channel modulates current flow through the active channel when a voltage is applied between the source and drain diffusions. The interfacial capacitance is determined by the extent of occupancy of the immobilized receptor molecules by target molecules. Target molecules can be either charged or uncharged. Change in interfacial capacitance upon target molecule binding results in modulation of an externally supplied current through the channel.

Journal ArticleDOI
TL;DR: In this article, medium energy ion scattering and atomic force microscopy were used to examine the degradation of ultrathin Al2O3 layers under ultrahigh vacuum annealing and the effects of low-temperature oxidation.
Abstract: The stability of Al2O3 films during thermal processing will help determine their usefulness as an alternative gate dielectric for advanced complementary metal-oxide-semiconductor devices. We used medium energy ion scattering and atomic force microscopy to examine the degradation of ultrathin Al2O3 layers under ultrahigh vacuum annealing and the effects of low-temperature oxidation. No degradation is observed at 900 °C, but voids appear at higher temperatures. Growth of interfacial SiO2 takes place during low-pressure oxidation at 600 °C, which may limit the capacitance of extremely thin structures.

Patent
Miyato Takashi1
23 Mar 2001
TL;DR: In this paper, the capacitors of adjacent memory cells are formed in different layers so that the flat regions in which capacitors are formed are overlapped one another, and an upper-layer insulation film is formed on the entire surface.
Abstract: PROBLEM TO BE SOLVED: To secure large capacitor capacitance by forming capacitors of adjacent memory cells in different layers so that the flat regions in which capacitors are formed are overlapped one another. SOLUTION: After removing the resist, an upper-layer insulation film 19 is formed on the entire surface. An upper-layer contact hole 12 is buried, and at the same time a conductive film is formed so that it covers the entire surface. Next, a resist on which patterning is performed is formed. Using the resist as a mask, the conductive film is etched, and an upper-layer storage 14 is formed. After removing the resist, an upper-layer insulation film 21 is formed on the entire surface. Then, an upper-layer cell plate 20 is formed on the entire surface, and lower-layer capacitor 22 and an upper-layer capacitor 23 are formed. Thus, the capacitors of the adjacent memory cells are formed in different layers so that the flat regions in which the storage nodes of the adjacent capacitors are formed are overlapped one another.