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Showing papers on "Decoupling capacitor published in 2006"


Journal ArticleDOI
TL;DR: In this article, a joint-phase redundancy control for flying capacitor multilevel inverters (FCMIs) has been proposed to improve capacitor voltage balancing under a wide range of power factors and modulation indices.
Abstract: Recent research in flying capacitor multilevel inverters (FCMIs) has shown that the number of voltage levels can be extended by changing the ratio of the capacitor voltages. For the three-cell FCMI, four levels of operation are expected if the traditional ratio of the capacitor voltages is 1:2:3. However, by altering the ratio, the inverter can operate as a five-, six-, seven-, or eight-level inverter. According to previous research, the eight-level case is referred to as maximally distended (or full binary combination schema) since it utilizes all possible transistor switching states. However, this case does not have enough per-phase redundancy to ensure capacitor voltage balancing under all modes of operation. In this paper, redundancy involving all phases is used along with per-phase redundancy to improve capacitor voltage balancing. It is shown that the four- and five-level cases are suitable for motor drive operation and can maintain capacitor voltage balance under a wide range of power factors and modulation indices. The six-, seven-, and eight-level cases are suitable for reactive power transfer in applications such as static var compensation. Simulation and laboratory measurements verify the proposed joint-phase redundancy control.

240 citations


Journal ArticleDOI
TL;DR: In this article, the authors proposed a closed-form expression for the parasitics associated with the interconnects of the decoupling capacitors of a dc power distribution network.
Abstract: Investigation of a dc power delivery network, consisting of a multilayer PCB using area fills for power and return, involves the distributed behavior of the power/ground planes and the parasitics associated with the lumped components mounted on it Full-wave methods are often employed to study the power integrity problem While full-wave methods can be accurate, they are time and memory consuming The cavity model of a rectangular structure has previously been employed to efficiently analyze the simultaneous switching noise (SSN) in the power distribution network However, a large number of modes in the cavity model are needed to accurately simulate the impedance associated with the vias, leading to computational inefficiency A fast approach is detailed herein to accelerate calculation of the summation associated with the higher-order modes Closed-form expressions for the parasitics associated with the interconnects of the decoupling capacitors are also introduced Combining the fast calculation of the cavity models of regularly shaped planar circuits, a segmentation method, and closed-form expressions for the parasitics, an efficient approach is proposed herein to analyze an arbitrary shaped power distribution network While it may take many hours for a full-wave method to do a single simulation, the proposed method can generally perform the simulation with good accuracy in several minutes Another advantage of the proposed method is that a SPICE equivalent circuit of the power distribution network can be derived This allows both frequency and transient responses to be done with SPICE simulation

113 citations


Patent
27 Apr 2006
TL;DR: In this article, the authors presented an LED drive circuit capable of feeding equal currents to parallel-connected LED circuits with a simple arrangement, where a current source generating a temporally altering current and a first smoothing capacitor and a second smoothing capacitance were provided.
Abstract: To realize an LED drive circuit capable of feeding equal currents to parallel-connected LED circuits with a simple arrangement, there are provided a current source generating a temporally altering current and a first smoothing capacitor and a second smoothing capacitor, and there are also provided: a first LED circuit, containing one LED or series-connected LEDs, which is connected in parallel with the first smoothing capacitor; and a second LED circuit, containing one LED or series-connected LEDs, which is connected in parallel with the second smoothing capacitor, the drive circuit comprising: a current-dividing coil containing two coils coupled at a tap so that the current generated in the current source flows into the tap; a first reverse current blocking diode connected between an end of the current-dividing coil and an electrode of the first smoothing capacitor; and a second reverse current blocking diode connected between another end of the current-dividing coil and an electrode of the second smoothing capacitor.

94 citations


Patent
21 Jun 2006
TL;DR: In this paper, a power supply arrangement is specified in which a capacitor with a low internal resistance, in particular a supercap, is connected via a means for charging and via a load current regulator to a connecting means for an electrical load.
Abstract: A power supply arrangement is specified in which a capacitor with a low internal resistance, in particular a supercap ( 3 ), is connected via a means for charging ( 4 ) to an input ( 1 ) and via a load current regulator ( 9 ) to a connecting means ( 7 ) for an electrical load ( 8 ). Together with a feedback path, a control loop is formed for the load current through the electrical load ( 8 ). It is therefore possible to allow flash operation in applications such as mobile telephones with rechargeable batteries with a high internal resistance, with provision for high energy utilization from the capacitor, with controlled discharging with a regulated current.

92 citations


Journal ArticleDOI
TL;DR: In this paper, the authors presented a capacitance calculation chart, which enables selecting the correct capacitance for measuring the I-V characteristics by a computerized data acquisition system, considering the acquisition speed of the measuring system as demonstrated through two measurement samples in this paper.

84 citations


Patent
18 Oct 2006
TL;DR: In this article, the authors present circuits and methods for a multi-electrode implantable stimulator device incorporating one decoupling capacitor in the current path established via at least one cathode electrode and at least anode electrode.
Abstract: Disclosed herein are circuits and methods for a multi-electrode implantable stimulator device incorporating one decoupling capacitor in the current path established via at least one cathode electrode and at least one anode electrode. In one embodiment, the decoupling capacitor may be hard-wired to a dedicated anode on the device. The cathodes are selectively activatable via stimulation switches. In another embodiment, any of the electrodes on the devices can be selectively activatable as an anode or cathode. In this embodiment, the decoupling capacitor is placed into the current path via selectable anode and cathode stimulation switches. Regardless of the implementation, the techniques allow for the benefits of capacitive decoupling without the need to associate decoupling capacitors with every electrode on the multi-electrode device, which saves space in the body of the device. Although of particular benefit when applied to microstimulators, the disclosed technique can be used with space-saving benefits in any stimulator device.

79 citations


Proceedings ArticleDOI
18 Jun 2006
TL;DR: In this article, a full-bridge/push-pull circuit-based bidirectional DC-DC converter and its control methods are proposed to perform adequate charge and discharge operation between lowvoltage high-current super capacitor side and high-voltage low-current side with drive train and main battery.
Abstract: In recent years, energy storage systems assisted by super capacitor have been widely researched and developed to progress power systems for the electronic vehicles. In this paper, a full-bridge/push-pull circuit-based bidirectional DC-DC converter and its control methods are proposed. From the results of detailed experimental demonstration, the proposed system is able to perform adequate charge and discharge operation between low-voltage high-current super capacitor side and high-voltage low-current side with drive train and main battery. Furthermore, conduction losses and voltage/current surge are drastically reduced by ZVS operation with loss-less snubber capacitor in high voltage side as well as the synchronous rectification in low-voltage high-current super capacitor side.

64 citations


Patent
08 Mar 2006
TL;DR: In this article, a one terminal capacitor interface circuit (40) for sensing the capacitance of a capacitor (52) includes a differential integrating amplifier (44) having an input common mode voltage and two summing nodes (66) and (68) whose voltage is substantially equal to the input commonmode voltage, a switching circuit (57) for charging the capacitor(52) to a first voltage level (Vx) in a first phase(Phl ), connecting, in a second phase (Ph2,
Abstract: A one terminal capacitor interface circuit (40) for sensing the capacitance of a capacitor (52) includes a differential integrating amplifier (44) having an input common mode voltage and two summing nodes (66) and (68) whose voltage is substantially equal to the input common mode voltage, a switching circuit (57) for charging the capacitor (52) to a first voltage level (Vx) in a first phase(Phl ), connecting, in a second phase (Ph2), the capacitor (52) to one of the summing nodes (66) of the differential amplifier (44) to provide a first output (Vop); charging the capacitor (52) to a second voltage level (Vz) in a third phase (Ph3), and connecting, in a fourth phase (Ph4), the capacitor (52) to the other summing node (68) of the differential amplifier (44) to provide a second output (Von); the combined first and second outputs (Vop) and (Von), representing the capacitance of the capacitor (52) substantially independent of the input common mode voltage.

60 citations


Patent
11 Sep 2006
TL;DR: In this article, a buck switching regulator is proposed to generate a ripple voltage signal being related to the switching output voltage and provide the ripple voltage signals to the feedback voltage node for use in the fixed on-time, minimum off-time feedback control scheme where the magnitude of the signal is a function of the capacitance value of the second capacitor.
Abstract: A buck switching regulator formed on an integrated circuit and receives an input voltage and provides a switching output voltage on a switch output node using a fixed on-time, minimum off-time feedback control scheme. The buck switching regulator includes a first capacitor and a first resistor formed on the integrated circuit where the first capacitor and the first resistor are connected in series between the switch output node and a feedback voltage node, and a second capacitor coupled between the DC output voltage node and the feedback voltage node. The first capacitor and the first resistor generate a ripple voltage signal being related to the switching output voltage and provide the ripple voltage signal to the feedback voltage node for use in the fixed on-time, minimum off-time feedback control scheme where the magnitude of the ripple voltage signal is a function of the capacitance value of the second capacitor.

53 citations


Journal ArticleDOI
TL;DR: It is shown that it is highly desirable to maintain the effective series inductance of the decoupling capacitors as low as possible to decrease the overshoots of the response of the dual-voltage power distribution system over a wide range of operating frequencies.
Abstract: Multiple power supply voltages are often used in modern high-performance ICs, such as microprocessors, to decrease power consumption without affecting circuit speed. To maintain the impedance of a power distribution system below a specified level, multiple decoupling capacitors are placed at different levels of the power grid hierarchy. The system of decoupling capacitors used in power distribution systems with multiple power supplies is described in this paper. The noise at one power supply can propagate to the other power supply, causing power and signal integrity problems in the overall system. With the introduction of a second power supply, therefore, the interaction between the two power distribution networks should be considered. The dependence of the impedance and magnitude of the voltage transfer function on the parameters of the power distribution system is investigated. An antiresonance phenomenon is intuitively explained in this paper. It is shown that the magnitude of the voltage transfer function is strongly dependent on the parasitic inductance of the decoupling capacitors, decreasing with smaller inductance. Design techniques to cancel and shift antiresonant spikes out of range of the operating frequencies are presented. It is also shown that it is highly desirable to maintain the effective series inductance of the decoupling capacitors as low as possible to decrease the overshoots of the response of the dual-voltage power distribution system over a wide range of operating frequencies. A criterion for an overshoot-free voltage response is presented in this paper. It is noted that the frequency range of the overshoot-free voltage response can be traded off with the magnitude of the response.

50 citations


Journal ArticleDOI
TL;DR: In this article, the authors analyzed several parameters, such as piezoelectric type and magnitude of excitation, required energy and voltage, and the magnitude of the capacitor, to find an appropriate choice of storage capacitor and voltage intervals.
Abstract: Mechanical energy generated by human activity may be converted to electrical energy using piezoelectric film inserts inside a shoe. This electrical energy can be collected in the form of charge accumulated in a storage capacitor. Under this scheme, the storage capacitor needs only to be connected to the load when it has enough energy for the requested operation. This time interval depends on several parameters: piezoelectric type and magnitude of excitation, required energy and voltage, and magnitude of the capacitor. This work analyzes these parameters to find an appropriate choice of storage capacitor and voltage intervals.

Patent
19 Dec 2006
TL;DR: In this paper, a capacitor charging circuit is provided with a primary side output voltage sensing circuit including an RC network having an RC time constant with a predetermined relationship to the RC time constants of the output capacitor.
Abstract: A capacitor charging circuit is provided with a primary side output voltage sensing circuit including an RC network having an RC time constant with a predetermined relationship to the RC time constant of the output capacitor. Once the capacitor voltage reaches a fully charged level, the charging mode is terminated. The output voltage is continuously detected by measuring the voltage across the primary side RC network that decays at a predetermined rate with respect to the output capacitor and the charging mode is commenced once the RC voltage falls to a predetermined level. According to a further aspect of the invention, a switch control circuit in a flyback converter controls the switch off time in response to detection of a change in the slope polarity of the voltage at a terminal of the switch.

Patent
08 Nov 2006
TL;DR: In this paper, an LC resonant circuit for an oscillator with reduced fluctuation of a frequency conversion gain is presented, where the oscillator is defined as a series of parallel circuits of a fine adjustable capacitor and a second capacitor bank.
Abstract: An LC resonant circuit of an oscillator includes a parallel circuit of an inductor, a first fine adjustable capacitor and a first capacitor bank, and a series circuit of a second fine adjustable capacitor and a second capacitor bank. A frequency conversion gain of the oscillator is the sum of a frequency conversion gain of the oscillator based upon the first fine adjustable capacitor which decreases according to increase of a capacitance value of the capacitor bank and a frequency conversion gain based upon the second fine adjustable capacitor which increases according to increase of a capacitance value of the second capacitor bank. Accordingly, an LC resonant circuit for an oscillator with reduced fluctuation of a frequency conversion gain, and an oscillator and a data processing equipment using the same are provided.

Patent
23 Jun 2006
TL;DR: In this paper, a storage controller has a capacitor pack for storing energy to supply power during a main power loss, a temperature sensor that senses the capacitor pack temperature, and a CPU, which detects that the temperature of the battery has risen above a predetermined threshold while operating at a first voltage value.
Abstract: A storage controller has a capacitor pack for storing energy to supply power during a main power loss, a temperature sensor that senses the capacitor pack temperature, and a CPU, which detects that the temperature of the capacitor pack has risen above a predetermined threshold while operating at a first voltage value and determines whether a projected lifetime of the capacitor pack is less than the warranted lifetime. If the projected lifetime is less than the warranted lifetime, the CPU reduces the operating voltage of the capacitor pack to a second value, in order to increase the capacitor pack lifetime. In one embodiment, the CPU reduces the voltage if an accumulated normalized running time of the capacitor pack is greater than an accumulated calendar running time. In another embodiment, the CPU reduces the voltage if a percentage capacitance drop of the capacitor pack is greater than a calendar percentage capacitance drop.

Patent
07 Sep 2006
TL;DR: In this article, a method for controlling a pitch control system of a wind turbine includes providing a charged backup battery configured to supply no energy to a DC link when full AC input power is available.
Abstract: A method for controlling a pitch control system of a wind turbine includes providing a charged backup battery configured to supply no energy to a DC link when full AC input power is available, wherein the DC link includes a DC link capacitor. The method further includes using energy stored in the DC link capacitor to operate a pitch control system during a loss or dip of AC input power, and maintaining charge on the DC link capacitor using the charged backup battery as voltage across the DC link capacitor drops during the operation of the pitch control system.

Proceedings ArticleDOI
19 Mar 2006
TL;DR: In this paper, a 1 kW 42/14 V flying capacitor converter was designed for 42 V automotive system and the experimental results verified the analysis and the prototype achieved the efficiency close to 96% at full load.
Abstract: Flying capacitor technology is widely used in low power dc-dc converter, especially in power management of the integrated circuit. These circuits have a limitation: high pulse currents will occur at the switching transients, which will reduce the efficiency and cause EMI problems. This makes it difficult to use this technology in high power level conversion. This paper presents a new design method for dc-dc converter with flying capacitor technology. The new method can reduce the high pulse current which usually causes serious problem in traditional converters. Therefore the power level of this new designed converter can be extended to 1 kW or even higher. A 1 kW 42/14 V flying capacitor converter was designed for 42 V automotive system. The experimental results verified the analysis and the prototype achieved the efficiency close to 96% at full load.

Patent
09 Nov 2006
TL;DR: In this article, a vehicle source device capable of performing a more accurate temperature-rise corresponding to the ability of the capacitor is provided, where the correlation of the temperature and the internal resistance corresponding to capacitance of the current capacitor in time of activation is obtained in advance.
Abstract: A vehicle source device capable of performing a more accurate temperature-rise corresponding to the ability of the capacitor is provided. The correlation of the temperature and the internal resistance corresponding to the ability of the current capacitor in time of activation is obtained in advance, the internal resistance is obtained for every repetition of charge/discharge, and the temperature of the inside of the capacitor is obtained from the correlation. Since the accurate temperature of the inside of the capacitor is obtained, the capacitor is accurately temperature-raised to the target temperature.

Patent
27 Oct 2006
TL;DR: In this article, a capacitor array in an integrated circuit with active unit capacitors arranged amongst the dummy unit capacitor cells to provide visual and electrical symmetry is presented, where visual symmetry is provided by uniform capacitor plate selection and uniform spacing between each.
Abstract: A capacitor array in an integrated circuit with active unit capacitor cells arranged amongst the dummy unit capacitor cells to provide visual and electrical symmetry. The electrical symmetry provides electrical matching between active unit capacitor cells and the visual symmetry provide process uniformity between the unit capacitor cells. Visual symmetry may be provided by uniform capacitor plate selection and uniform spacing between each. Electrical symmetry is provided by appropriately arranging active unit capacitors amongst dummy unit capacitors in the capacitor array. The capacitor array may be used in an integrated circuit such as for a equally weighted or binary weighted capacitor array or ladder in an analog to digital converter or a digital to analog converter. Methods and rules of layout for arranging the unit capacitors may be manually performed or automatically performed by computer aided design software.

Journal ArticleDOI
TL;DR: In this article, the authors proposed a GA to find the decoupling capacitors for suppressing the cavity-mode resonances in the printed circuit board power-bus structure, where the optimal positions and circuital values of decoupled capacitors are efficiently determined to selectively mitigate specific resonance peaks.
Abstract: The genetic algorithm (GA) is suggested to find the decoupling capacitors for suppressing the cavity-mode resonances in the printed circuit board power-bus structure. The optimal positions and circuital values of decoupling capacitors are efficiently determined to selectively mitigate specific resonance peaks. The optimization of the damping is validated with the measurement and develops to multiresonance modes' damping.

Patent
Mike Dommaschk1, Jörg Dorn1, Euler Ingo1, Jörg Lang1, Quoc-Buu Tu1, Klaus Würflinger1 
08 Dec 2006
TL;DR: In this article, a method and a device for converting an electrical current include at least one phase module having an AC voltage connection and at least 1 DC voltage connection, each phase module branch includes a series circuit of submodules, each having a capacitor and one power semiconductor.
Abstract: A method and a device for converting an electrical current include at least one phase module having an AC voltage connection and at least one DC voltage connection. A phase module branch is disposed between each DC voltage connection and the AC voltage connection. Each phase module branch includes a series circuit of submodules, each having a capacitor and at least one power semiconductor. The apparatus can establish aging of an energy storage device in a simple manner by using a capacitor diagnosis device for a time-dependent determination of the capacitance of each capacitor.

Patent
19 Jun 2006
TL;DR: Capacitor-based pulse forming networks and methods are provided which require fewer inductors are that pulsed more frequently to provide a smaller, lower mass, and lower inductance pulse forming network having better pulse shaping characteristics than conventional pulse-forming networks.
Abstract: Capacitor based pulse forming networks and methods are provided which require fewer inductors are that pulsed more frequently to provide a smaller, lower mass, and lower inductance pulse forming network having better pulse shaping characteristics than conventional pulse forming networks. In one implementation, the invention can be characterized as a capacitor based pulse forming network comprising a plurality of inductors adapted to be coupled to a load, a plurality of capacitor units, and a plurality of switches. Each switch couples a respective capacitor unit to a respective inductor, wherein multiple capacitor units are coupled to each inductor by separate switches. The plurality of switches are adapted to non-simultaneously discharge at least some of the multiple capacitor units to provide non-simultaneous pulses through a given inductor to the load and not through other inductors. The non-simultaneous pulses form at least a portion of an output pulse waveform to the load.

Proceedings ArticleDOI
27 Mar 2006
TL;DR: Three modifications of the cross coupled design are introduced and the tradeoffs among ESD performance, transient response and gate leakage are analyzed, offering designers greater flexibility in decoupling capacitor design for 90nm and below.
Abstract: On-chip decoupling capacitors are generally used to reduce power supply noise. Traditional decoupling capacitor designs using NMOS devices may no longer be suitable for 90nm CMOS technology due to increased concerns on thin-oxide gate leakage and electrostatic discharge (ESD) reliability. A cross coupled design for standard cells have recently been proposed to address the ESD issue. In this paper, three modifications of the cross coupled design are introduced and the tradeoffs among ESD performance, transient response and gate leakage are analyzed. As shown here, the modifications offer designers greater flexibility in decoupling capacitor design for 90nm and below.

01 Jun 2006
TL;DR: In this article, a low voltage Electrolytic Capacitor Pulse Forming Inductive Network (LVEC PFIN) is proposed to provide railgun-capable power pulses by first draining the capacitors into a power inductor and then interrupting the flow of current via a switch counterpulsing technique.
Abstract: : Electric weapons, such as the railgun, require a pulse power supply capable of providing reliable high-current, high-energy pulses of many megawatts. Pulsed alternators potentially have the same maintenance issues as other motor-generator sets, so a solid-state system would be desirable, but high voltage capacitor systems are not robust enough for the field. We propose here a Low Voltage Electrolytic Capacitor Pulse Forming Inductive Network (LVEC PFIN) which stores power in a relatively low voltage capacitor bank and provides weapon power pulses by first draining the capacitors into a power inductor and then interrupting the flow of current via a switch counterpulsing technique in order to achieve railgun-appropriate voltages. For this thesis, a 13 kJ LVEC PFIN was constructed, using solid-state semiconductor switches to redirect 25 kA of current into a 1m ohms load, and the redirection of larger currents is clearly feasible. This technique may be a viable alternative once the energy densities and equivalent series resistance of low voltage capacitors and ultracapacitors reach the necessary levels.

Patent
Okabe Yoshiharu1, Muto Takanori1
15 May 2006
TL;DR: In this article, a discharge prevention circuit and electronic equipment with the discharge prevention circuits are provided, which includes a first power line, a second power line and a capacitor, a current detector and a switch.
Abstract: A discharge prevention circuit and electronic equipment with the discharge prevention circuit are provided. The discharging prevention circuit includes a first power line, a second power line, a capacitor, a current detector and a switch. The first and second power lines directly or indirectly connect a power feed line to a load. The capacitor and the current detector are directly or indirectly connected in series between the first and second power lines. The switch is disposed in the first or second power line. The current detector detects at least charging current to the capacitor and discharging current from the capacitor. And if the current detector detects discharging current from the capacitor, the switch acts to stop current flow between the capacitor and the power feed line through the switch.

Patent
19 Oct 2006
TL;DR: In this article, the authors proposed a non-contact power supply unit that can obtain a stable DC output of high electric power which is of low noise and highly efficient and that can reduce the cost and size of an entire system by miniaturizing a transformer with the reduction of the number of circuit elements and the use of high frequency.
Abstract: PROBLEM TO BE SOLVED: To provide a non-contact power supply unit that can obtain a stable DC output of high electric power which is of low noise and highly-efficient and that can reduce the cost and size of an entire system by miniaturizing a transformer with the reduction of the number of circuit elements and the use of high frequency. SOLUTION: A power transmission side circuit is made up of a half-bridge switching circuit 2, a series resonance capacitor C2, and a power-transmission transformer T1. The capacitor C2 performs current resonance between the transformer T1 and inductances L1, L2. A receiving side circuit is structured with a receiving transformer T2 and a voltage-doubler rectifier circuit 3. A capacitor C3 works for rectification and the current resonance. COPYRIGHT: (C)2008,JPO&INPIT

Patent
Sergey Alenin1
01 Sep 2006
TL;DR: In this paper, a low-noise charge pump circuit with a first flying capacitor (Cl) selectively coupled to a first voltage (VCC) during a first recharging phase and a second flying capacitor selectively coupled with a second voltage (GND) during the first charging phase is described.
Abstract: A low noise charge pump circuit includes a first terminal (8) of a first flying capacitor (Cl) selectively coupled to a first voltage (VCC) during a first recharging phase and a second terminal (7) of the first flying capacitor selectively coupled to a second voltage (GND) during the first recharging phase. The second terminal of the first flying capacitor is coupled to a precharge control circuit (25, 27) during a first parasitic capacitance precharging phase that occurs after the first recharging phase to cause the voltage of the first terminal of the first flying capacitor to equal an output voltage (Vout). The first terminal of the first flying capacitor is coupled to an output conductor (10) conducting the output voltage during a first discharging phase that occurs after the first parasitic capacitance precharging phase. The second terminal of the first flying capacitor is coupled to a discharge control circuit (2, 4) which increases the voltage of the second terminal of the first flying capacitor during the first discharging phase until the output voltage is equal to a regulated value.

Patent
20 Dec 2006
TL;DR: An untethered stylus, configured to cooperate with a location sensor, includes a coil resonant circuit configured to develop an arbitrary AC voltage in response to a varying magnetic field produced by the location sensor as discussed by the authors.
Abstract: An untethered stylus, configured to cooperate with a location sensor, includes a coil resonant circuit configured to develop an arbitrary AC voltage in response to a varying magnetic field produced by the location sensor. The coil resonant circuit includes a first capacitor and an inductive coil. A power converter includes a switch circuit having an output coupled to a second capacitor, an input coupled to the coil resonant circuit, and a threshold voltage. The switch circuit facilitates charging of the second capacitor in response to the arbitrary AC voltage and discontinuance of second capacitor charging in response to a voltage across the first capacitor reaching the threshold voltage so as to prevent diversion of a discharging current when the arbitrary AC voltage exceeds the threshold voltage. A stable DC voltage is provided at the output of the switch circuit. The power converter is preferably devoid of a Zener diode.

Proceedings ArticleDOI
24 Jul 2006
TL;DR: A novel application for carbon nanotube devices is presented, implementing a high density 3D capacitor, which can be useful for decoupling applications to reduce supply voltage variations.
Abstract: We present a novel application for carbon nanotube devices, implementing a high density 3D capacitor, which can be useful for decoupling applications to reduce supply voltage variations. The capacitor consists of staggered layers of interleaved carbon nanotubes, alternately connected to anode and cathode contacts. The device can realize a capacitance/area, significantly larger than the ITRS's projected requirements for year 2018. The capacitance per unit area can exceed 1pF//spl mu/m/sup 2/, with a quality factor greater than 100 at 1GHz.

Patent
Yee-Chia Yeo1, Chenming Hu1
13 Jan 2006
TL;DR: In this article, a decoupling capacitor is formed on a semiconductor substrate that includes a silicon surface layer, and a substantially flat bottom electrode is formed in a portion of the semiconductor surface layer.
Abstract: A decoupling capacitor is formed on a semiconductor substrate that includes a silicon surface layer. A substantially flat bottom electrode is formed in a portion of the semiconductor surface layer. A capacitor dielectric overlies the bottom electrode. The capacitor dielectric is formed from a high permittivity dielectric with a relative permittivity, preferably greater than about 5. The capacitor also includes a substantially flat top electrode that overlies the capacitor dielectric. In the preferred application, the top electrode is connected to a first reference voltage line and the bottom electrode is connected to a second reference voltage line.

Patent
13 Jul 2006
TL;DR: In this article, an area-efficient capacitor-free low-dropout regulator based on a current feedback frequency compensation technique is proposed, which does not require an off-chip capacitor for stability and is particularly useful for system on-chip applications.
Abstract: An area-efficient capacitor-free low-dropout regulator based on a current-feedback frequency compensation technique is disclosed. An implementation of a current feedback block with a single compensation capacitor is used to enable capacitance reduction. The resultant low-dropout regulator does not generally require an off-chip capacitor for stability and is particularly useful for system-on-chip applications.