Showing papers on "Electronic circuit simulation published in 1997"

SIMON-A simulator for single-electron tunnel devices and circuits

Abstract: SIMON is a single electron tunnel device and circuit simulator that is based on a Monte Carlo method. It allows transient and stationary simulation of arbitrary circuits consisting of tunnel junctions, capacitors, and voltage sources of three kinds: constant, piecewise linearly time dependent, and voltage controlled. Cotunneling can be simulated either with a plain Monte Carlo method or with a combination of the Monte Carlo and master equation approach. A graphic user interface allows the quick and easy design of circuits with single-electron tunnel devices. Furthermore, as an example of the usage of SIMON, we discuss the essential problem of random background charge and present possible solutions.

Design and optimization of CPW circuits using EM-ANN models for CPW components

Abstract: Accurate and efficient electromagnetically trained artificial neural-network (EM-ANN) models have been developed for coplanar waveguide (CPW) circuit components. Modeled components include: CPW transmission lines (frequency dependent Z/sub 0/ and /spl epsiv//sub re/), 90/spl deg/ bends, short-circuit stubs, open-circuit stubs, step-in-width discontinuities, and symmetric T-junctions. These models allow for circuit design, simulation, and optimization within a commercial microwave circuit simulator environment, while providing the accuracy of electromagnetic (EM) simulation. Design and optimization of a CPW folded double-stub filter and a 50-/spl Omega/ 3-dB power divider circuit using the developed CPW EM-ANN models are demonstrated.

Full-wave analysis of packaged microwave circuits with active and nonlinear devices: an FDTD approach

Abstract: This paper presents a comprehensive full-wave analysis of packaged nonlinear active microwave circuits by applying the extended finite-difference time-domain (FDTD) method. Based on the approach of using equivalent sources, the device-wave interaction is characterized and incorporated into the FDTD time-marching scheme. As a consequence, analysis of linear and nonlinear properties, including harmonic generation and intermodulation, can be accomplished by employing a large-signal device circuit model. The implementation is first validated by comparing results of FDTD and HP MDS simulation of the circuit without the packaging structure. The analysis then goes beyond the capability of the circuit simulator to include the packaging effect. This analysis is useful in circuit design involving electromagnetic compatibility/electromagnetic interference (EMC/EMI) problems.

Electro-thermal circuit simulation using simulator coupling

Abstract: The paper presents a methodology for simulating the static and dynamic performance of integrated circuits in the presence of electro-thermal interactions on the integrated circuit die. The technique is based on the coupling of a finite element method (FEM) program with a circuit simulator. In difference to other known simulator couplings a time step algorithm is used. Its implementation into simulation tools is described. The thermal modeling of the die/package structure and the extended modeling of the electronic circuit is discussed. Simulation results which indicate the capabilities of the methodology for electro-thermal simulation are compared to experimental results.

Guidelines for Modeling Power Electronics in Electric Power Engineering Applications

Abstract: This paper presents a summary of guidelines for modeling power electronics in various power engineering applications. This document is designed for use by power engineers who need to simulate power electronic devices and sub-systems with digital computer programs. The guideline emphasizes the basic issues that are critical for successfully modeling power electronics devices and the interface between power electronics and the utility or industrial system. The modeling considerations addressed in this guideline are generic for all power electronics modeling independent of the computational tool. However, for the purposes of illustration, the simulation examples presented are based on the EMTP or EMTP type of programs. The procedures used to implement power electronics models in these examples are valuable for using other digital simulation tools.

Electro-thermal circuit simulation using simulator coupling

Abstract: The paper presents a methodology for simulating the static and dynamic performance of integrated circuits in the presence of electro-thermal interactions on the integrated circuit die. The technique is based on the coupling of a finite element method (FEM) program with a circuit simulator. In contrast to other known simulator couplings a time step algorithm is used, Its implementation in simulation tools is described. The thermal modeling of the die/package structure and the extended modeling of the electronic circuit is discussed. Simulation results which indicate the capabilities of the methodology for electro-thermal simulation are compared to experimental results.

PSCAN'96: new software for simulation and optimization of complex RSFQ circuits

Abstract: The first version of PSCAN program (Personal Superconductor Circuit ANalyzer) was introduced in 1991. The program is a general purpose superconductor circuit simulator with an emphasis on the design of Rapid Single-Flux-Quantum (RSFQ) circuits. In the intervening years a number of new features were gradually added to the program. In particular, verification of the correct circuit behavior was enhanced using a special hierarchical Single-Flux-Quantum Hardware Description Language (SFQHDL). Next, a fast heuristic algorithm for margin optimization was introduced, which increased the number of parameters that can be simultaneously optimized in reasonable CPU times. Finally, recently we improved the numerical algorithm used for the simulation by using sparse symmetric positive definite matrices (instead of general structure band matrices as before). As a result, simulation speed has increased almost tenfold. Now it takes about 30 seconds of a CPU time on HP716/100 workstation to run a 2000 ps simulation of a 120-Josephson-junction circuit, and about a week to optimize all parameters of a two hundred Josephson junction circuit. We have merged all these improvements in a new version of our simulator, PSCAN'96.

Accurate frequency-domain modeling and efficient circuit simulation of high-speed packaging interconnects

Abstract: The paper describes an efficient frequency-domain modeling and simulation method of a coupled interconnect system using scattering parameters. First, low-order rational approximations of the multiport scattering parameters are derived over a wide frequency range using a robust interpolation technique. The method applies frequency normalization, shift, and Householder QR orthogonalization to improve the stability and the accuracy when solving the resulting systems of equations. For interconnects characterized with frequency-dependent parasitic parameters, the order of the rational of approximation is reduced by using appropriate reference system. Then, the generated multiport pole-residue models are incorporated into a circuit simulator using recursive convolution. Thus, the method avoids explicit convolution, numerical transform, and artificial filtering of a large number of points that are often necessary in conventional approaches. Examples with experimental and simulated results are given to illustrate the method.

Analysis and optimization of monolithic inductors and transformers for RF ICs

Abstract: A fast and accurate approach for analyzing Si IC spiral inductors and transformers is presented. The technique incorporates the substrate in the calculation to fully characterize the devices. Many test structures are fabricated and measured data is used to verify the analysis technique over a broad frequency range. Suitable lumped broadband equivalent circuit models of the structures are presented which can be incorporated into traditional circuit simulators. A custom CAD tool ASITIC is described which is used for the design and optimization of inductors and transformers.

System and method for extracting parasitic impedance from an integrated circuit layout

Abstract: A comprehensive system and method allow an integrated circuit designer to extract accurate estimates of parasitic impedances in interconnection lines of an integrated circuit. The method includes collecting values of electrical characteristic parameters to provide a technology profile for a particular fabrication process. An Interconnect Primitive Library builder provides a collection of interconnect `primitives` that any interconnect structure fabricated under the fabrication process can be broken down into, and combines it with the technology profile for simulations in a 3-dimensional field solver to extract parameterized coupling capacitances and other characteristic impedances for each interconnect primitive. An extraction tool traces a signal path of an integrated circuit and decomposes the interconnect structures on the signal path into interconnect primitives and maps them to the Interconnect Primitive Library. An RC network module provides an RC network based on the characterized parametric values in the mapped interconnect primitives. The RC network thus provided can be used to accurately estimate signal delays in a circuit simulator or delay calculator.

Large-signal microwave characterization of AlGaAs/GaAs HBT's based on a physics-based electrothermal model

Abstract: A physics-based multicell electrothermal equivalent circuit model is described that is applied to the large-signal microwave characterization of AlGaAs/GaAs HBT's. This highly efficient model, which incorporates a new multifinger electrothermal model, has been used to perform dc, small-signal and load-pull characterization, and investigate parameter-spreads due to fabrication process variations. An enhanced Newton algorithm is presented for solving the nonlinear system of equations for the model and associated circuit simulator, which allows a faster and more robust solution than contemporary quasi-Newton nonlinear schemes. The model has been applied to the characterization of heterojunction bipolar transistor (HBT) microwave power amplifiers.

Design centering methods for yield optimization of cryoelectronic circuits

Abstract: We present the results of comparison of different design centering methods, e.g. simplicial approximation method and centers-of-gravity method. The effectiveness of the proposed yield optimization strategies is demonstrated by application to various RSFQ circuits and analytical test functions. A SPICE-type program which includes the possibilities of analog behavior modeling and transient noise simulation was used for circuit simulation. Based on these methods, an interactive yield optimization framework for cryo-electronic circuits was developed and tested.

A unified substrate current model for weak and strong impact ionization in sub-0.25 /spl mu/m NMOS devices

Abstract: We have developed a new unified substrate current model for weak and strong impact-ionization The model which is semi-empirical is able to capture non-local field effects The importance of this model is its simplicity requiring three parameters which can be extracted easily from a single wafer-level measurement The implementation of this model in a circuit simulator provides the capability to include hot-carrier and ESD effects into circuit design optimization, which is essential for achieving design-in-reliability targets

A new approach to extract the threshold voltage of MOSFETs

Abstract: A new method is presented to extract the threshold voltage of MOSFETs. It is developed based on an integral function which is insensitive to the drain and source series resistances of the MOSFETs. The method is tested in the environments of circuit simulator (SPICE), device simulation (MEDICI), and measurements.

Modeling single-mode lasers and standard single-mode fibers using a hardware description language

Abstract: The authors describe a user-friendly way to model single-mode semiconductor lasers and standard single-mode fibers using hardware description language dedicated to behavioral description of analog and mixed-signal systems (HDL-A). The laser and fiber models written in HDL-A, can be associated with circuit-level models or macromodels already available for electronic components to provide a simultaneous time-domain simulation of an entire optical communication link in a standard circuit simulator environment.

Method for manufacturing an integrated circuit

Abstract: For manufacturing an integrated circuit, the production of a design for the circuit that comprises a plurality of MOS transistors is controlled by employment of a circuit simulator. ##EQU1## are calculated in the circuit simulator for the terminal nodes of the MOS transistors upon prescription of the voltages between gate and source V gs , between drain and source V ds , and between the substrate and source V bs in a consistent transistor model wherein drift, diffusion and short-channel effects are taken into consideration.

Method and apparatus for virtualizing system operation

Abstract: A method and apparatus for emulating operation of a complex circuit within a system, thereby creating a virtual system, is achieved within a system that includes a central processing unit (CPU), system memory, at least one functional module, and an emulator that includes a circuit simulator, a virtual coupler, and an evaluation module. The circuit simulator simulates the functionality of the complex circuit, includes an individual system identifier, and is operably coupled to, and substantially controlled by, the at least one functional module. At system start-up, or at initiation of a simulation test, the system determines its configuration by obtaining the individual system identifiers of each system element. Because the circuit simulator has a system identifier, it is treated by the system as a real entity. As such, when the CPU requests the function of the complex circuit to be performed, the CPU provides its request to the at least one functional module. The requests are also received by the virtual coupler which interprets the requests as being directed to the circuit simulator. At this point, the virtual coupler couples the at least one functional module to the circuit simulator such that operational instructions and/or operand data processed by the functional module are provided to the circuit simulator. The circuit simulator processes the operand data based on the operational instructions and provides the manipulated data back to the system.

A time-domain full-wave extraction method of frequency-dependent equivalent circuit parameters of multiconductor interconnection lines

Abstract: A time-domain full-wave method for the extraction of frequency-dependent equivalent circuit parameters of multiconductor interconnection lines is presented in this paper. The circuit parameters extracted by this method can be inserted into circuit simulation software to investigate time-domain responses of a high-speed IC system with multiconductor interconnects. Because the definitions of the voltage and the current are not unique in full-wave analysis, transformation among circuit parameters according to different definitions of the voltage and current is also presented. The method is based on the finite-difference time-domain (FDTD) method, and the reliability of this method is illustrated by its application to representative problems.

Computer-aided analog electronics teaching

Abstract: A computer-aided approach to teaching undergraduate course in electronics is discussed in this paper. It is shown that the symbolic manipulation packages like MAPLE give an additional insight that cannot be obtained by using a numerical simulation package like SPICE. Symbolic manipulation (MAPLE) and numerical simulation (SPICE)-an excellent complementary combination-can enable the students to analyze and understand complicated circuits.

Automatic netlist extraction for measurement-based characterization of off-chip interconnect

Abstract: An approach is presented for modeling board-level, package-level, and multichip module (MCM) substrate-level interconnect circuitry based on measured time-domain reflectometry (TDR) data. The time-domain scattering parameters of a multiport system are used to extract a SPICE netlist from standard elements to match the behavior of the device up to a user-specified cutoff frequency. Linear or nonlinear circuits may be connected to the model ports, and the entire circuit simulated in a standard circuit simulator. Two- and four-port microstrip-circuit examples are characterized, and the simulation results are compared with measured data. Delay, reflection, transmission, and crosstalk are accurately modeled in each case.

SPICE electrothermal modeling of power integrated circuits

Abstract: A new analog behavioral modeling method for mixed electrical-thermal SPICE simulations was developed. It can be applied to power integrated circuits as well as to VLSI circuit simulation, where the devices exhibit a dynamic electrothermal behavior. Both the electrical and thermal laws are modeled by means of "in line equation" controlled sources, which form a global electrical equivalent circuit, that can be analyzed with a general purpose circuit simulator. The proposed electrothermal macromodel greatly increases the simulation accuracy and the analysis time is comparable with that of standard intrinsic SPICE models.

Mixed-mode circuit simulation with full-wave analysis of interconnections

Abstract: In this paper, a simulation technique is introduced, which couples solid-state device modeling and full-wave, electromagnetic simulation of interconnections. A three-dimensional (3-D) FDTD scheme is adopted to describe the circuit passive part, whereas numerical device simulation techniques are employed for the active semiconductor devices. The resulting scheme allows for accurate mixed-mode simulation, which inherently accounts for propagation and radiative effects. An application example is discussed, consisting of the simulation of a Si-MMIC RF switch; results have been compared with predictions coming from a standard microwave circuit simulator, validating the tool, and illustrating its application range.

A new spline based FET model for MESFETs and HEMTs

Abstract: IN this paper a new spline based nonlinear transistor model for MESFETs and HEMTs is described. A bias dependent small signal equivalent circuit has been developed, as well as the corresponding static and large signal equivalent circuit. The linear circuit can be optimized without changing the quality of the static circuit. The nonlinear circuit is shown to be identical to the linear circuit for low input power and at all bias points. The model has been introduced into HP-EEsofs circuit simulator "Libra" and verified by utilizing linear and nonlinear measurements.

Method for constructing fault classification tables of analog circuits

Abstract: The present invention discloses a method for constructing the fault classification tables of analog circuits, and the fault classification tables can be further applied to construct analog CAT tools. The constructing method uses the fault models but the normal models inserting in parts of the analog circuit components, and then utilizes a circuit simulator to obtain waveform from the defect analog circuit. Exclusive and non-exclusive classification schemes are applied to establish the failure modes of the defect analog circuit when the waveform is recorded as a fault dictionary. It is unnecessary to construct a real analog circuit as the conventional does.

QFT-based robust controller design of series resonant DC/DC converters

Abstract: In this paper, based on quantitative feedback theory, the authors design a robust controller for a series resonant DC-to-DC power converter. In order to analyze the stability, a small-signal model of series resonant power converters is adopted. Simulation results illustrate that the required performances, sensitivity, maximum overshoot and allowable settling time can be achieved subject to different loads. In addition, the performance is evaluated with the PSpice circuit simulator.

Issues in power diode modelling for circuit simulation

Abstract: There has been a proliferation of technical papers on power device modelling for circuit simulation. Even the power diode, the simplest of all power devices, has been the subject of a fair amount of research interest in the modelling of its characteristics. The issues in the modelling of the power diode for circuit simulation are discussed in this paper, based on the authors' experiences. Among the issues discussed are the modelling techniques, accuracy, validation, implementation, simulation performance and parameter extraction. It is concluded that until the availability of a simple, reliable and well-understood model with standardized parameter estimation procedure, and which is actively supported by commercial simulators, the impact of this modelling work on the computer aided design of power electronics circuits is expected to remain minimal.

Recent advances in simulation of power electronics converter systems

Abstract: This paper presents a comprehensive state-of-the-art of the recent advances in simulation of power electronic converter systems. Knowing the importance of simulation, this paper reviews the various methods of modelling, circuit analysis approaches, numerical techniques etc. Several general purpose simulators and dedicated power electronic simulators have been discussed. A few demonstrative examples of simulation of power electronic converters by using different simulators are provided. Practical difficulties in simulation, challenges, new developments and scope for future work are also discussed.

Method and apparatus for performing integrated circuit timing including noise

Abstract: A method, apparatus, and article of manufacture for performing timing analysis on an integrated circuit, which run a high level chip timing tool with initial RC delays for all nets of the integrated circuit; determine a list of time-critical nets from a timing report and obtain a full RC coupling network for each time-critical net; run a detailed circuit simulator on the full RC coupling network for each time-critical net to obtain actual RC delays for each time-critical net; determine a delta time for each time-critical net, based on a difference between the initial RC delay and the corresponding actual RC delay for each time-critical net; and rerun the high level chip timing tool, including the delta time for each time-critical net to obtain a timing analysis of the integrated circuit which accounts for signal to signal noise.