Showing papers on "Electronic packaging published in 2018"

Recent progress in development of tungsten-copper composites: Fabrication, modification and applications

Abstract: Tungsten copper (W-Cu) composites, as a traditional refractory material, are promising materials for manufacture of electrical contacts and electrodes, heavy duty electronic contacts, welding and electro-forging dies, heat sinks, packaging material, arcing resistance electrodes and thermal management devices owing to their excellent properties. This critical review presents and discusses the current progress of W-Cu composites. Starting with an introduction of the synthesis methods for W-Cu composites, including the conventional and modern preparation approaches. After that we focus on the description of the improvement of mechanical properties and arc-erosion properties by modification techniques. Finally, the advantages of W-Cu composites in applications such as electrical contacts, electronic packaging materials, and heat sinks, as well as military materials, are described, respectively.

Effective thermal transport highway construction within dielectric polymer composites via a vacuum-assisted infiltration method

Abstract: Materials with superior thermal conduction, stable electrical insulation, and excellent mechanical strength that can be obtained at low cost are desirable for electronic packaging and thermal management in electrical engineering systems. There is therefore relentless interest in developing highly robust thermally conductive and electrically insulating polymer-based composites. Herein, a facile and environmentally friendly method to construct three-dimensional thermal transport channels in a poly(vinyl alcohol) (PVA) matrix composite is reported. The formation of thermal transport highways improves the thermal conductivity up to 4.79 W m−1 K−1 for alumina (Al2O3) loading of 45.4 vol% in the composites. The thermal conductivity achieved is the highest value for this Al2O3 content range compared with reported work, and is 1700% compared with that of pure PVA. In the meantime, the composites still retain outstanding electrical insulation properties and excellent mechanical strength. The heat-conducting and electrically insulating composites not only have promising applications in electronic packaging and electrical engineering systems, but the technically facile vacuum-assisted infiltration method is a new avenue for the mass production of spherical filler/polymer composites.

Nano liquid metal for the preparation of a thermally conductive and electrically insulating material with high stability

Abstract: Dielectric materials typically demonstrate poor thermal conductivity, which limits their application in emerging technologies in integrated circuits, computer chips, light-emitting diode lamps, and other electronic packaging areas. Using liquid metal microdroplets as inclusions to develop thermal interface materials has been shown to effectively improve thermal pathways, but this type of material may become electroconductive with the application of a concentrated compressive stress. In this study, an isotropic nano-liquid metal thermally-conductive and electrically-insulating material (nLM-THEM) is developed by combining a modified polymer and well-dispersed nanoparticles, achieving an ∼50× increase in thermal conductivity over the base polymer. In addition, the thermal conductivity of nLM-THEMs exhibits no significant change with varying humidity and a stable anti-corrosion effect even in direct contact with aluminum. More importantly, nLM-THEMs demonstrate a stable electrical insulating property upon compressive stress, while conventional micro-LM-THEMs exude liquid metal. This exceptional combination of thermal and electrical insulation properties is enabled by the interconnection of uniform and spherical liquid metal nanoparticles to create more thermally-conductive pathways, and surfactant modified nanoparticles ensure excellent electric insulation. Moreover, this material can achieve passive heat exchange through rapid heat dissipation, which demonstrates its great application potential in the electronic packaging area.

High thermal conductivity liquid metal pad for heat dissipation in electronic devices

Abstract: Novel thermal interface materials using Ag-doped Ga-based liquid metal were proposed for heat dissipation of electronic packaging and precision equipment. On one hand, the viscosity and fluidity of liquid metal was controlled to prevent leakage; on the other hand, the thermal conductivity of the Ga-based liquid metal was increased up to 46 W/mK by incorporating Ag nanoparticles. A series of experiments were performed to evaluate the heat dissipation performance on a CPU of smart-phone. The results demonstrated that the Ag-doped Ga-based liquid metal pad can effectively decrease the CPU temperature and change the heat flow path inside the smart-phone. To understand the heat flow path from CPU to screen through the interface material, heat dissipation mechanism was simulated and discussed.

Topology optimization and heat dissipation performance analysis of a micro-channel heat sink

Abstract: Junction temperature in the electronic packaging process is one of the critical factors affecting the service life of electronic devices. A micro-channel heat sink is a common heat dissipating device used to reduce the thermal resistance between components and substrate. In order to maximize the heat dissipation while minimizing the pressure drop, this paper adopts a topology optimization method. A material interpolation method based on variable density principle is used together with a moving asymptote algorithm for the optimization. The physics is governed by the heat and mass transfer, coupled with the momentum conservation in the fluid. Four parameters are varied in order to investigate their influence on the optimization process. A three-dimensional geometry has been constructed to study the flow field and the results are compared to a reference case to verify the temperature uniformity and thermal performance of the model. It is demonstrated that the optimized design of the micro-channel heat sink is reliable and effective.

Nanopackaging: Nanotechnologies and Electronics Packaging

Abstract: Nanotechnologies are being applied to microelectronics packaging, primarily in the applications of nanoparticle nanocomposites, or in the exploitation of the superior mechanical, electrical, or thermal properties of carbon nanotubes. Composite materials are studied for high-k dielectrics, electrically conductive adhesives, conductive "inks," underfill fillers, and solder enhancement. These trends are demonstrated by paper presentations over the past few years at ECTC and other conferences, which show research to be concentrated in relatively few laboratories, with little work being done on the packaging requirements of the new nanoelectronics technologies. Future needs (predictably) include education and software development

Reliability of Novel Ceramic Encapsulation Materials for Electronic Packaging

Abstract: Enhancements on power electronic systems with reduced chip area and miniaturized passive components are subject of several research activities in academics and industry. To realize such fu...

Roles and Requirements of Electronic Packaging in 5G

Abstract: In this work, we illustrate the roles and requirements of packaging in the implementation of hybrid beamforming-based mmWave massive MIMO architectures for the development of 5G hardware modules and systems.

Electronic packaging and passive devices for low temperature space applications

Abstract: In addition to the challenges of cold operation for active devices, passive devices and packaging materials exhibit changes in electrical behavior as a function of temperature. Results on the temperature dependent behavior of capacitors and substrate materials as a function of temperature and frequency to −185°C will be discussed. These properties may further change if the materials exhibit degradation due to mechanical loading. Whether the electronics are intended to operate at cold temperatures or simply survive exposure to cold temperatures, the packaging technologies between the electronics and the outside world are required to survive multiple extreme low temperature cycles, which combine the challenges of cold temperature exposure and fatigue at low temperatures. To that end, the impact of extreme low temperatures on the mechanical behavior of various key electronic packaging materials will be discussed along with experimental results obtained from several representative assemblies that have been thermally cycled or shock cycled down to −120°C or lower.

Co-Designed High Voltage Module

Abstract: Co-design and co-engineering have the potential to significantly advance the state of the art of electronics packaging. A co-designed approach moves away from a sequential design approach (electrical layout, then a mechanical module design, and finally the addition of a heat sink) and replaces it with an approach where the electrical, thermal, and mechanical domains are all simultaneously designed for during the initial design. This paper demonstrates how a co-design approach can be used to design an electronics module. This work shows the design and fabrication of a 30 kV module using two aspects of co-design: (1) multi-functional components (MFCs) and (2) quick parametric analysis. There is a need for advanced high voltage electronics packages due to the recent development of high voltage (15–30 kV) single-die silicon carbide (SiC) power devices to realize their full potential. This paper describes a 30 kV module with integrated heat sinks, double sided device cooling, and an air cooled heat sink which removes heat from four sides of the module. The module has numerous MFCs allowing a compact form factor and efficient design. In addition, the geometry and materials selections were based off a co-design tool which allows quick parametric analysis for both thermal and stress. This paper demonstrates the capabilities and benefits of moving away from a traditional design approach and implementing a co-design methodology.

Solid and Vapor Chamber Integrated Heat Spreaders: Which to Choose and Why

Abstract: The performance and reliability of semiconductor electronics require that thermal management hardware be used to adequately cool devices, components, and packages. A vital component of many devices, including but not limited to PAs, CPUs, GPUs, and LEDs, is the integrated heat spreader (IHS). IHSs are implemented to spread the heat from the small electronic component to a larger area in order to facilitate sufficiently low thermal resistance active or passive cooling to the final fluid-cooled heat sink in the stack. One question that still needs to be addressed for electronics packaging is “Under what circumstances do vapor chamber heat spreaders outperform solid IHSs?” This paper is aimed at providing a straightforward approach to addressing this question, specifically during the early “scoping” design stage. Sufficiently accurate steady-state thermal network models for both solid and vapor chamber IHSs are proposed for estimating the overall stack resistance of a package, including TIM1, IHS, TIM2, and convective heat sink. In this way, the performance of both heat spreading technologies can be compared and contrasted over a range of geometric and operating parameters without having to resort to complex numerical models, which may require specialized expertise and/or be too expensive and time-consuming for early-stage design phases of electronic packages.

Reliability Analysis of Lead-Free Solders in Electronic Packaging Using a Novel Surrogate Model and Kriging Concept

Abstract: A novel reliability evaluation procedure of lead-free solders used in electronic packaging (EP) subjected to thermomechanical loading is proposed. A solder ball is represented by finite elements (FEs). Major sources of nonlinearities are incorporated as realistically as practicable. Uncertainties in all design variables are quantified using available information. The thermomechanical loading is represented by five design parameters and uncertainties associated with them are incorporated. Since the performance or limit state function (LSF) of such complicated problem is implicit in nature, it is approximately generated explicitly in the failure region with the help of a completely improved response surface method (RSM)-based approach and the universal Kriging method (KM). The response surface (RS) is generated by conducting as few deterministic nonlinear finite element analyses as possible by integrating several advanced factorial mathematical concepts producing compounding beneficial effect. The accuracy, efficiency, and application potential of the procedure are established with the help of Monte Carlo simulation (MCS) and the results from laboratory investigation reported in the literature. The study conclusively verified the proposed method. Similar studies can be conducted to fill the knowledge gap for cases where the available analytical and experimental studies are limited or extend the information to cases where reliability information is unavailable. The study showcased how reliability information can be extracted with the help of multiple deterministic analyses. The authors believe that they proposed an alternative to the classical MCS technique.

High Thermal Conductivity Ceramics and Their Composites for Thermal Management of Integrated Electronic Packaging

Abstract: Recently, ceramic substrates have been of great interest for use in light emitting diode (LED) packaging materials because of their excellent heat transfer capability. The thermal conductivities of ceramic-based substrates are usually one or two orders of magnitude higher than those of conventional epoxy-based substrates. The demand for ceramic substrates with high mechanical strength and thermal conductivity is also growing due to their use in thin and high-power device packaging substrates. Examples are direct bonded copper or aluminum or direct plated copper substrates for insulated gate bipolar transistors; thin and robust ceramic packages for image sensor modules that are used in mobile smart phones; ceramic packages for miniaturized chip-type supercapacitors; and high-power LED packages. This chapter will cover the development and application of ceramics and ceramic composites with high thermal conductivity for the thermal management of integrated electronic packaging substrates such as high-power LED packaging, power device packaging, etc.

A Wire-Bondless Packaging Platform for Silicon Carbide Power Semiconductor Devices

Abstract: As silicon carbide (SiC) power semiconductor devices continue to mature for market adoption, innovative power electronics packaging designs and materials are needed. Wire-bonding loop is one of the limiting factors in traditional module packaging methods. Wire-bondless packaging methods have been demonstrated with low losses and to allow integration of gate drive circuit. In this paper, a wire-bondless packaging platform, referred to as power overlay kiloWatt (POL-kW), for SiC devices is presented. The packaging platform is intended for motor drives and power conversion in automotive, aerospace, and renewable power applications. POL-kW module's electrical and thermal performances are first summarized from previous experimental evaluations and numerical simulations. Although some of the evaluations were made using Si and Si–SiC hybrid modules, the results are applicable to SiC modules. Compared with aluminum wire-bonds, the utilization of polyimide-based Cu via interconnections resulted in much reduced parasitic inductance, contributing to significantly lower switching loss and less voltage overshoot. The POL-kW module with integrated heat sinks showed low thermal resistance, which was further reduced by double-sided cooling. Recent reliability results are presented, including high-temperature storage, temperature cycling, and power cycling.

The Realization of Redistribution Layers for FOWLP by Inkjet Printing

Abstract: The implementation of additive manufacturing technology (e.g., digital printing) to the electronic packaging segment has recently received increasing attention. In almost all types of Fan-out wafer level packaging (FOWLP), redistribution layers (RDLs) are formed by a combination of photolithography, sputtering and plating process. Alternatively, in this study, inkjet-printed RDLs were introduced for FOWLP. In contrast to a subtractive method (e.g., photolithography), additive manufacturing techniques allow depositing the material only where it is desired. In the current study, RDL structures for different embedded modules were realized by inkjet printing and further characterized by electrical examinations. It was proposed that a digital printing process can be a more efficient and lower-cost solution especially for rapid prototyping of RDLs, since several production steps will be skipped, less material will be wasted and the supply chain will be shortened.

Flexible h-BN foam sheets for multifunctional electronic packaging materials with ultrahigh thermostability.

Abstract: Recently developed electronic packaging materials based on low dimensional materials such as carbon nanotubes, graphene, and hexagonal boron nitride (h-BN) exhibit advantageous electrical, thermal, and mechanical properties for protecting electronic devices as well as dissipating heat flux from highly integrated circuits or high power electronic devices. Their thermal transport is mainly achieved by precise control of the nanostructure for nano-fillers to form the thermally conductive pathway. However, due to the viscoelastic behaviors of host polymeric materials, their phase or structural stability is significantly reduced by enhanced molecular motion at high temperature, resulting in poor thermal transport and mechanical strength. Here, we introduce flexible and robust h-BN foam sheets with a three-dimensional network structure, which exhibit much enhanced thermostability at high temperature. Furthermore, the additional infiltration of Fe3O4 nanoparticles into those structures results in relatively high electromagnetic absorbing performance. The combination of thermostability and mechanical strength based on the h-BN foam sheets provides novel opportunities for multifunctional thermally conductive materials in coatings and films without severely compromising auxiliary characteristics such as mechanical strength and thermal stability.

Technological aspects of silver particle sintering for electronic packaging

Abstract: Purpose This paper aims to find proper technological parameters of low-temperature joining technique by silver sintering to eventually use this technique for reliable electronic packaging. Design/methodology/approach Based on the literature and author’s own experience, the factors influencing the nanosized Ag particle sintering results were identified, and their significance was assessed. Findings It has been shown that some important technological parameters clearly influence the quality of the joints, and their choice is unambiguous, but the meaning of some parameters is dependent on other factors (interactions), and they should be selected experimentally. Originality/value The value of this research is that the importance of all technological factors was analyzed, which makes it easy to choose the technological procedures in the electronic packaging.

Composite nano silver paste and rapid sintering packaging method

Abstract: The invention provides a composite nano silver paste preparation method and a rapid sintering packaging method. The preparation method comprises steps that S1, cleaning treatment and centrifugation ofmicron silver sheets are carried out; S2, nano silver particles and an organic solvent are mixed into the micron silver sheets acquired in S1, and the ultrasonic process and stirring are carried out;and S3, an organic carrier and the surfactant are added to the mixed solution acquired in S2, and the ultrasonic process and stirring are carried out to acquire the composite nano silver paste. The packaging method comprises steps that S1, the silver paste is coated through dispensing or screen printing; S2, a chip coated with the composite nano silver paste and a substrate are aligned and stacked; and S3, hot press welding or ultrasonic hot press welding is utilized for sintering to complete interconnection. The method is advantaged in that rapid sintering and packaging of the composite nanosilver paste are realized, material cost is reduced, the preparation process is environmental friendly, the packaging process and the equipment are simplified, production efficiency is improved, energy saving and emission reduction are facilitated, volume contraction caused by continuous sintering in the service process of a nano silver paste sintering body can be reduced, service life and reliability of a packaging device are improved, and the method is suitable for high reliability low temperature packaging interconnection of high temperature electronic devices in the electronic packaging field.

Reliability of 3D additive manufactured packages

Abstract: 3D integration and additive technologies are an emerging field in electronic packaging, which becomes more and more established. A new technology approach is presented, aiming to build the package around the components. The components are embedded in an additive process, where a redistribution layer (RDL) is created on top of this embedding surface. The shape of package and RDL is individually adjustable. This creates many possibilities for new applications. However, reliability experiences on additive 3D electronic packages are still lacking. The novel technology has the advantage to use copper for the RDL instead of sinter materials, which are used in common additive manufacture processes such as aerosol-, inkjet- or screen-printing. Functional reliability is demonstrated on an embedded 0201 LED with such copper RDL. Applying a temperature shock test of $-20/ 85 ^{\circ}\mathrm{C}$ for 2000 cycles has been accomplished without any trace of degradation. Functional tests, optical and imaging (X-Ray, SEM) analysis have been performed additionally to demonstrate the potential reliability of this novel integration technology. Furthermore, adhesion of the RDL to the substrate has been investigated by tape and pull tests. Both tests could not provoke delamination nor erosion of copper nor any other defects. This indicates the technology potential to perform well even considering harsh environmental requirements and should be further investigated.

Thermomechanical and Viscoelastic Properties of Dielectric Materials Used in Fan-Out Wafer-Level Packaging

Abstract: The fan-out wafer-level packaging (FOWLP) has gained significant interests owing to the cost effectiveness, high performance, high I/O density, high integration capability, small form factor and diverse range of applications. FOWLP is currently seen as the best fit for the highly demanding mobile and wireless market, and is attractive for other markets focusing on high performance and small size. However, up to date, wafer warpage is still one of the unresolved challenges in this field. As an integral component of the electronic packaging, dielectric materials could also contribute to the overall warpage. Nonetheless, this contribution is sometimes excluded from the theoretical warpage calculation. Even when the dielectric material was included in the finite element modeling, the simulation results have not been able to duplicate the actual experimental results yet. The difference between the modeling and the experimental results could be due to the only incorporation of elastic properties of the polymer dielectric materials in the simulation, instead of the viscoelastic behavior. Here, we reported the thermomechanical, and viscoelastic properties of three commercial dielectric materials that have been used in the FOWLP and construct master curves via the time-temperature superposition principle to study the relaxation behaviors of the dielectric materials. These results could support the ongoing development of an accurate modeling system for prediction and control of wafer warpage in the FOWLP.

Polyimides in High-Performance Electronics Packaging and Optoelectronic Applications

Abstract: When the first commercial polyimide was brought to market as Kapton* film in the early 1960s [1] the electronics industry was comparatively still in its infancy. At that time most dielectrics in applications ranging from device insulation to electronic packages consisted of inorganic materials such as A12O3, SiO2, and other metal oxides or nitrides. Chip carriers in high-performance applications such as mainframe computers and components for space and military applications were all based on multilayer ceramic packages [2–4]. The ceramic used was mostly based on alumina, which has a relatively high dielectric constant of 9. In the late 1970s it became obvious that the goal of ever faster computers was strongly hampered by the delays an electrical signal incurs while it travels from one chip to another by way of the package. These signal delays caused by the interaction of the electrical signal with the dielectric medium of the package are aptly called package delays. As we will see below, a material with a lower dielectric constant decreases the signal delays. To that end polyimides were introduced into electronics packages in the early 1980. Polyimides were chosen primarily because of their suitable combination of properties, which include higher thermal stability, good mechanical properties, and a comparatively low dielectric constant [5–7].

Experimentally Minimizing the Gap Distance Between Extra Tall Packages and PCB Using the Digital Image Correlation (DIC) Method

Abstract: The stacked 3D packaging is a trend in current electronic packaging field. The stacked dies are molded to insulate the functional chips from the moisture or the dust. To achieve electrical performance or cost benefits, potential 3D integration schemes that were developed vertically may cause cruel reliability issues, like warpage. For an 8 × 8 × 6 mm3 Wafer Level Package (WLP), the warpage behavior at the top surface cannot comprehensively represent the package deformation since the considerable height change between the PCB and the component's surface, To investigate the solder reliability one indirect way is to observe the relative height change from the edges or the corners of the top surface to the bottom PCB or substrate surface. In this case, the closer the two data points we select-one on the surface component and another on the substrate-the clearer situation it will illustrate. However, there is a gap between those points since the shadow and blind areas caused by the light source and camera angle. Hence, reducing the gap distance is a major concern. In this work, an experimental study on minimizing this gap between a wafer-level-chip-scale-package, (8mm× 8 mm with 6mm and 4 mm heights), and PCB were accomplished with the digital image correlation (DIC) technique. Key factors such as camera angle, white light source, sample orientation, and the subset size and step were studied and experimentally optimized to achieve accurate results. These optimal parameters were aimed to keep the gap distance less than 0.5mm during the extra tall packages measurement.

Packaging of silicon photonic devices: from prototypes to production

Abstract: The challenges associated with the photonic packaging of silicon devices is often underestimated and remains technically challenging. In this paper, we review some key enabling technologies that will allow us to overcome the current bottleneck in silicon photonic packaging; while also describing the recent developments in standardisation, including the establishment of PIXAPP as the worlds first open-access PIC packaging and assembly Pilot Line. These developments will allow the community to move from low volume prototype photonic packaged devices to large scale volume manufacturing, where the full commercialisation of PIC technology can be realised.