Showing papers on "Silicon nitride published in 1989"

Time and temperature dependence of instability mechanisms in amorphous silicon thin-film transistors

Abstract: We have measured the time and temperature dependence of the two prominent instability mechanisms in amorphous silicon thin‐film transistors, namely, the creation of metastable states in the a‐Si:H and the charge trapping in the silicon nitride gate insulator. The state creation process shows a power law time dependence and is thermally activated. The charge trapping process shows a logarithmic time dependence and has a very small temperature dependence. The results for the state creation process are consistent with a model of Si dangling bond formation in the bulk a‐Si:H due to weak SiSi bond breaking stabilized by diffusive hydrogen motion. The logarithmic time dependence and weak temperature dependence for the charge trapping in the nitride suggest that the charge injection from the a‐Si:H to the nitride is the rate limiting step and not subsequent conduction in the nitride.

Low‐Temperature Surface Passivation of Silicon for Solar Cells

Abstract: Low-temperature-deposited silicon nitride and aluminum oxide films are investigated for reducing carrier recombination at the silicon surface. The insulator/silicon interface properties (fixed charge density, fast interface state density, and surface recombination velocity) are studied as a function of deposition and annealing temperature in the range of 270/sup 0/ - 550/sup 0/C. The effects of UV irradiation and their elimination by charge-induced passivation are extensively discussed. The successful application of both films for front surface passivation of a novel thin-silicon solar cell of the back collection type (BACK-MIS cell) is demonstrated. Finally, a simple configuration for efficient back surface passivation of solar cells is introduced as a possible substitute for the conventional back surface field.

Glass waveguides on silicon for hybrid optical packaging

Abstract: Work on deposited glass waveguides on silicon to form waveguides and filters is reviewed. The choice of these particular waveguides makes sense only as part of a consistent approach to optoelectronic packaging. Hybrid optical packaging on silicon (HOPS) is described and briefly compared with other techniques. For these packages, two waveguides were developed: a tight mode waveguide with a silicon nitride rib core for matching a semiconductor laser and a loose mode waveguide with a phosphosilicate glass core for matching an optical fiber. >

Deposition of silicon-containing films using organosilicon compounds and nitrogen trifluoride

Abstract: In a low-pressure reactor, the addition of nitrogen trifluoride to a gaseous organosilicon compound such as tetraethoxysilane (TEOS) or tetramethylcyclotetroxysilane (TMCTS) results in surprisingly enhanced silicon dioxide deposition rates. The oxide deposited using this process also has the capability of filling features having aspects ratios up to at least 1.0, and may exhibit low mobile ion concentrations. The process is also applicable for depositing other silicon-containing films such as polysilicon and silicon nitride.

Oxidation Studies of Crystalline CVD Silicon Nitride

Abstract: Oxidation studies of CVD were performed in dry oxygen, oxygen‐argon, and oxygen‐nitrogen‐argon gas mixtures of various oxygen and nitrogen partial pressures at a total pressure of 1 atm at 1100°–1400°C. Parallel oxidation studies of single‐crystal silicon were also conducted for direct comparison. It was observed that the oxidation of both and Si followed parabolic growth kinetics with activation energies of about 115 kcal/mol and about 30 kcal/mol, respectively. The formation of a single layer of and evolution of could not account for the much lower parabolic rate constants and much higher activation energy for than for Si during the oxidation. Detailed characterization of the oxidation scales using ellipsometry, step‐by‐step etching, SIMS, and XPS techniques indicated that a duplex oxidation scale consisting of and was formed when was oxidized. The intermediate scale was identified as a single‐phase material, not a physical mixture of and . The low oxidation rate and high activation energy for during the oxidation were attributed to the formation of and low oxygen diffusivity in this structurally dense phase.

Hot Isostatic Press Sintering and Properties of Silicon Nitride without Additives

Abstract: Fully densified silicon nitride without additives was fabricated by means of hot isostatic pressing. The sintering process of highly pure powder was investigated with special interest in the evolution of α–β phase transformation, densification, and microstructure development. It was observed that the transformation occurred without a liquid phase below 1730°C, which corresponds to the melting point of SiO2. Above 1730°C, the densification and β-grain elongation accelerated concurrently because of the appearance of liquid SiO2. However, full densification was attained at 1950°C together with marked grain growth. Flexural strength, microhardness, fracture toughness, and Young's modulus of sintered bodies were measured as a function of temperature. In the sintered body started from highly pure powder, excellent MOR behavior was found up to 1400°C. Impurity content of a few hundred ppm was found to be sufficient to make densification easy and to degrade high-temperature strength.

Wafer flood polishing

Abstract: In a chem-mech polishing process for planarizing insulators such as silicon oxide and silicon nitride, a pool of slurry is utilized at a temperature between 85° F.-95° F. The slurry particulates (e.g. silica) have a hardness commensurate to the hardness of the insulator to be polished. Under these conditions, wafers can be polished at a high degree of uniformity more economically (by increasing pad lifetime), without introducing areas of locally incomplete polishing.

Selective electroless copper for VLSI interconnection

Abstract: Cu is studied as a candidate for low-resistance VLSI interconnection. Simulation studies show that for effective channel length less than 0.5 mu m, the RC time constant of interconnection is a major part of the total delay. By reducing the resistivity of the interconnect, the operating speed can be increased by more than 20% without any change in design rule. A selective electroless deposition process was used to solve the Cu patterning difficulty. Patterns of 2.2- mu m pitch have been achieved with this process. The copper contamination issue is also studied; dielectric films such as silicon oxynitride and silicon nitride are shown to be effective in stopping Cu diffusion. By coating a thin Ni film on Cu, Cu corrosion can be reduced from 0.2 mu /h to less than 0.05 mu m/h at 100 degrees C in 4% KCL solution. >

Interfacial Characterization of Silicon Nitride Powders

Abstract: The composition of the surface and the behavior in aqueous suspensions of three silicon nitride powders were investigated using electron spectroscopy for chemical analysis (ESCA), potentiometric titrations, leaching experiments, and electrophoretic mobility. ESCA shows that the as-received powders have a surface-layer composition similar to that identified as an intermediate state between silica and silicon oxynitride. The original differences in pHiep between the three powders disappears by aging the powders. The common pHiep of 6.8 ± 0.3 for the three powders is interpreted as the equilibrium pHiep for silicon nitride in aqueous suspensions.

Gate dielectric and contact effects in hydrogenated amorphous silicon‐silicon nitride thin‐film transistors

Abstract: The characteristics of glow‐discharge hydrogenated amorphous silicon‐silicon nitride (a‐Si:H/a‐SiNx:H) thin‐film transistors (TFTs) are reported for various deposition conditions. TFTs incorporating a N‐rich nitride gate dielectric, a‐SiN1.6:H, are superior to a‐Si:H TFTs with a Si‐rich gate nitride, a‐SiN1.2:H. In particular, the N‐rich gate nitride TFTs show considerably less interface or near‐interface charging during operation, improved stability, and a higher field‐effect mobility. The average field‐effect mobility μFE is found to be 0.27 and 0.41 cm2/V s for the Si‐ and N‐rich gate nitride TFTs, respectively. A further improvement in mobility, μFE =0.61 cm2/V s, is achieved by increasing the N‐rich gate nitride deposition temperature from 250 to 450 °C. These results suggest that N‐rich a‐SiNx:H, deposited at elevated temperatures, yields a more abrupt or ‘‘cleaner’’ a‐SiNx:H/a‐Si:H interface. We also show, for the first time, that using n+ μc‐Si:H source‐drain contacts in place of n+ a‐Si:H improve...

Interfacial Bonding and Friction in Silicon Carbide [Filament]‐Reinforced Ceramic‐ and Glass‐Matrix Composites

Abstract: This paper reports interfacial shear strength and interfacial sliding friction stress assessed in unidirectional SiC-filament-reinforced reaction-bonded silicon nitride (RBSN) and borosilicate glass composites and 0/90 cross-ply reinforced borosilicate glass composite using a fiber pushout test technique. The interface debonding load and the maximum sliding friction load were measured for varying lengths of the embedded fibers by continuously monitoring the load during debonding and pushout of single fibers in finite-thickness specimens. The dependences of the debonding load and the maximum sliding friction load on the initial embedded lengths of the fibers were in agreement with nonlinear shear-lag models. An iterative regression procedure was used to evaluate the interfacial properties, shear debond strength ({tau}{sub d}), and sliding friction stress ({tau}{sub f}), from the embedded fiber length dependences of the debonding load and the maximum frictional sliding load, respectively. The shear-lag model and the analysis of sliding friction permit explicit evaluation of a coefficient of sliding friction ({mu}) and a residual compressive stress on the interface ({sigma}{sub 0}). The cross-ply composite showed a significantly higher coefficient of interfacial friction as compared to the unidirectional composites.

Fabrication of interpoly dielctric for EPROM-related technologies

Abstract: A method and a device formed by the method of forming a composite dielectric structure between the floating polysilicon electrode and the control electrode of an EPROM-type device is disclosed. The dielectic is characterized by a thin (0-80 angstroms) thermally-grown or CVD bottom oxide layer covered by a relatively thin (<200 angstroms) silicon nitride layer. The top layer comprises a CVD oxide deposited in a thickness up to 150 angstroms. The capacitively measured effective thickness of the complete structure is about 200 Å or less. The top layer CVD oxide has a thickness greater than the bottom oxide layer and greater than or equal to that of the silicon nitride layer and may also extend beyond the EPROM cell to form at least a part of the peripheral transistor dielectric.

Process for thermally depositing silicon nitride and silicon dioxide films onto a substrate.

Abstract: A thermal CVD process for forming silicon nitride-type or silicon dioxide-type films onto a substrate characterized by the steps of: a) introducing di-tert-butylsilane and at least one other reactant gas capable of reacting with said di-tert-butylsilane to form silicon nitride or silicon dioxide into a CVD reaction zone containing said substrate on which either a silicon nitride-type or silicon dioxide-type film is to be formed; b) maintaining the temperature of said zone and said substrate from about 450°C to about 900°C; c) maintaining the pressure in said zone from about 0.1 to about 10 Torr; and d) passing said gases into contact with said substrate for a period of time sufficient to form a silicon nitride-type or silicon dioxide-type film thereon.

Silicon nitride thin films prepared by the electron cyclotron resonance plasma chemical vapor deposition method

Abstract: Silicon nitride thin films prepared by the electron cyclotron resonance plasma chemical vapor deposition method at low substrate temperature ( 1017 Ω⋅cm and >10 MV/cm, respectively. These properties of silicon nitride thin films are close to those of stoichiometric silicon nitride (Si3N4) prepared by the thermal chemical vapor deposition method at high temperature (>600 °C). The interface trap state density between the silicon nitride film and silicon substrate was 4×1011 cm2/eV in the silicon band gap. An optical emission spectroscopy during the deposition indicated that the intensities of nitrogen molecular ions were much stronger than those of nitrogen molecules, and the silane was sufficiently decomposed into silicon and hydrogen atoms. It is consider...

Method of manufacturing capacitor

Abstract: In the invention, the thin natural oxide film formed on a surface of a first polycrystalline silicon layer containing an impurity diffused at a high concentration is transformed into a silicon nitride film by rapid nitriding. When the resultant structure is placed in a low-pressure CVD furnace to deposit a silicon nitride film, no natural oxide film is grown on the polycrystalline silicon layer. Hence, when the invention is applied to manufacture of a capacitor for a memory cell, the inter-layer insulative film of the capacitor is not too thick. As a result, a reliable capacitor suitable for micropatterning of elements can be formed between the first and second polycrystalline silicon layers.

Method of fabricating semiconductor device

Abstract: A method of fabricating a semiconductor device which includes: (1) a step of forming an opening in a silicon substrate using a first silicon oxide film and a first silicon nitride film formed on the silicon substrate as masks, (2) a step of forming a second silicon oxide film and a second silicon nitride film on the side wall of the opening by the reduced pressure CVD method and anisotropic etching method, (3) a step of performing isotropic dry etching using the first and second silicon oxide films as masks, and (4) a step of performing heat treatment in an oxidizing atmosphere using the first and second silicon nitride films as masks. Thereby, uniform isotropic etching may be accomplished by use of the dry etching method.

Vacuum-sealed silicon micromachined incandescent light source

Abstract: A silicon-filament vacuum-sealed incandescent light has been fabricated using technologies and materials derived from IC processes. The incandescent source consists of a heavily doped p/sup +/ polysilicon filament coated with silicon nitride and enclosed in a vacuum-sealed ( approximately=80 mT) cavity. The filament is electrically heated to reach a maximum temperature between 1500 and 1600 K, corresponding to a peak black body wavelength at approximately 2 mu m. The power required to achieve this temperature in a filament 350*3*1 mu m/sup 3/ is 3.5 mW. The cavity is sealed with a silicon-nitride window that is highly transmissive to the emitted radiation. The microlamp can be processed compatibly with circuits and has been operated in a liquid ambient. Without substrate cooling it requires several milliseconds for complete turn-off after being disconnected from power. >

Adhesion layer for platinum based sensors

Abstract: The marginal adhesion of platinum to silicon nitride is a serious issue in the fabrication of microbridge mass air flow sensors. High temperature stabilization anneals (500°-1000° C.) are necessary to develop the properties and stability necessary for effective device operation. However, the annealing process results in a significant reduction in the already poor platinum/silicon nitride adhesion. Annealing at relatively high temperatures leads to the development of numerous structural defects and the production of non-uniform and variable sensor resistance values. The use of a thin metal oxide adhesion Layvr, approximately 20 To 100 angstromw in thickness is very effective in maintaining platinum adhesion to silicon nitride, and through the high temperature anneal sequence.

Pyrolysis of Preceramic Polymers in Ammonia: Preparation of Silicon Nitride Powders

Abstract: The pyrolysis of cross-linked polycarbosilanes, polysilanes and polysilazanes in an ammonia atmosphere to 1473 K yields amorphous, low-carbon silicon nitride powders. The efficacy of carbon removal is independent of the polymer's structure or functionality but is partially dependent on the initial cross-linking temperature. The amorphous silicon nitride powders partially crystallize to α-Si3N4 by 1773 K.

Determination of crystallographic orientations in silicon films by Raman‐microprobe polarization measurements

Abstract: Local crystallographic orientations of semiconductors have been determined by a scanning Raman microprobe combined with polarization measurements. We present a method of Raman scattering determination of crystallographic orientations in silicon crystals which allows rapid determination with an accuracy of ±2°. It is found that surface morphology affects the Raman polarization analysis. For laser‐annealed silicon layers capped with silicon nitride films, unpolarized scattered light is superimposed on polarized scattered light, because incident light beams entering rough surfaces are directed into random orientations and produce the unpolarized scattered light. The degree of the surface roughness is estimated by assuming that the rough surface consists of periodically arranged spherical segments.

A novel technique and structure for the measurement of intrinsic stress and Young's modulus of thin films

Abstract: A novel technique and test structure to measure the intrinsic stress and Young's modulus on thin films with better than 10% accuracy has been developed. The structure is a doubly supported beam that is driven electrostatically by a capacitive drive electrode in the middle of the beam. The characteristic pull-in voltage of the beam is used to measure the intrinsic stress and Young's modulus of thin films. An intrinsic stress of 1.83*10/sup 7/ Pa and a Young's modulus of 2.2*10/sup 11/ Pa for heavily boron-doped silicon structures have been measured. The technique can be easily applied to a number of other thin films including polysilicon and silicon nitride. The test structure occupies a small area. >

Silicon nitride produced by catalytic chemical vapor deposition method

Abstract: The catalytic chemical vapor deposition method is applied to obtain silicon nitride insulating films usable in large‐scale integrated circuits. A N2 H4, N2 , and SiH4 gas mixture is decomposed by the catalytic or pyrolytic reaction with a heated catalyzer placed near substrates, and thus silicon nitride films are deposited at low temperatures around 300 °C with deposition rates higher than several hundreds A/min, without any help from plasma and photochemical excitation. It is found that the resistivity, the breakdown electric field, and also the hydrogen content of the films can be almost equivalent to those of the films deposited by the thermal chemical vapor deposition at 700 °C or more, and that their step coverage appears sufficient to apply them on device fabrication.

Inverse-T LDDFET with self-aligned silicide

Abstract: A method of fabricating an inverse-T LDDFET with salicide on a substrate is disclosed. The initial steps include anisotropic silicon nitride and incomplete polysilicon etching steps followed by an n - ion-implantation process. Then oxide sidewall spacers are formed and the unmasked polysilicon is removed completely. The LDDFET structure is formed by the implantation of ions to form heavily-doped source and drain regions. Thereafter oxide sidewall spacers are removed and the thin polysilicon step is oxidized completely. After the silicon nitride and silicon dioxide layers are removed, the self-aligned silicide is applied to form the inverse-T LDDFET with salicide.

Oxidation of Chemically‐Vapor‐Deposited Silicon Nitride and Slnglem‐Crystal Silicon

Abstract: The present 1000 C and 1300 C oxidation tests on 111-oriented single-crystal Si and dense CVD Si3N4 notes the oxidation rates of the latter in wet O2, dry O2, wet inert gas, and steam atmosphere conditions to be several orders of magnitude lower than the rates for the former in identical atmospheric conditions. Although the parabolic rate constant for Si increased linearly as the water vapor pressure increased, the parabolic rate constant for Si3N4 exhibited a nonlinear dependency on water vapor pressure in the presence of O2. NO and NH3 formation at the reaction interface of Si3N4, and the counterpermeation of these reaction products, are noted to dominate reaction kinetics.

Passivation for integrated circuit structures

Abstract: A method is described for producing an integrated circuit structure, including EPROMS, having excellent resistance to penetration by moisture and ion contaminants and a substantial absence of voids in an underlying metal layer in the structure, and, in the case of EPROMS, maintaining sufficient UV light transmissity to permit erasure which comprises stress relieving the underlying metal layer from stresses induced by the compressive stress of a silicon nitride encapsulating layer to inhibit the formation of voids therein by implanting the metal layer with ions to change the grain structure adjacent the surface of the metal layer; forming an insulating intermediate layer between said the layer and the silicon nitride layer selected from the class consisting of an oxide of silicon and silicon oxynitride having a compressive/tensile stress which sufficiently compensates for the compressive stress of the silicon nitride layer; and controlling the compressive stress in the silicon nitride layer to provide resistance to moisture and ion penetration superior to silicon dioxide or silicon oxynitride layers of similar thickness while inhibiting formation of voids in the metal layer.

Protection of a refractory metal silicide during high-temperature processing using a dual-layer cap of silicon dioxide and silicon nitride

Abstract: A method for protecting a refractory metal silicide during high-temperature processing using a dual-layer cap of silicon oxide and silicon nitride. The problem of a silicon nitride protective layer detaching itself from an underlying refractory metal silicide layer during high-temperature processing, thus allowing tungsten atoms within the layer to oxidize, is solved by laying down a silicon oxide layer beneath the silicon nitride layer. The oxide layer acts as a mechanical stress relief layer between the refractory metal silicide and the silicon nitride layer, preventing the lifting of the nitride layer during high-temperature processing steps.