Showing papers on "Silicon nitride published in 2000"

Surface passivation of crystalline silicon solar cells: a review

Abstract: In the 1980s, advances in the passivation of both cell surfaces led to the first crystalline silicon solar cells with conversion efficiencies above 20%. With today's industry trend towards thinner wafers and higher cell efficiency, the passivation of the front and rear surfaces is now also becoming vitally important for commercial silicon cells. This paper presents a review of the surface passivation methods used since the 1970s, both on laboratory-type as well as industrial cells. Given the trend towards lower-cost (but also lower-quality) Si materials such as block-cast multicrystalline Si, ribbon Si or thin-film polycrystalline Si, the most promising surface passivation methods identified to date are the fabrication of a p–n junction and the subsequent passivation of the resulting silicon surface with plasma silicon nitride as this material, besides reducing surface recombination and reflection losses, additionally provides a very efficient passivation of bulk defects. Copyright © 2000 John Wiley & Sons, Ltd.

Handbook of ceramic hard materials.

Abstract: Introduction: Novel Ultrahard Materials (A. Zerr & R. Riedel) STRUCTURES AND PROPERTIES Structural Chemistry of Hard Materials (W. Jeitschko, et al.) Phase Transitions and Material Synthesis using the CO 2 -Laser Heating Technique in a Diamond Cell (A. Zerr, et al.) Mechanical Properties and their Relation to Microstructure (D. Sherman & D. Brandon) Nanostructured Superhard Materials (S. Veprek) Corrosion of Hard Materials (K. Nickel & Y. Gogotsi) Interrelations Between the Influences of Indentation Size, Surface State, Grain Size, Grain-Boundary Deformation, and Temperature on the Hardness of Ceramics (A. Krell) Transition Metal Carbides, Nitrides, and Carbonitrides (W. Lengauer) New Superhard Materials: Carbon and Silicon Nitrides (J. Lowther) Effective Doping in Novel sp 2 Bonded Carbon Allotropes (G. Jungnickel, et al.) SYNTHESIS AND PROCESSING Directed Metal Oxidation (V. Jayaram & D. Brandon) Self-Propagating High-Temperature Synthesis of Hard Materials (Z. Munir & U. Anselmi-Tamburini) Hydrothermal Synthesis of Diamond (K. Nickel, et al.) Chemical Vapor Deposition of Diamond Films (C.-P. Klages) Vapor Phase Deposition of Cubic Boron Nitride Films (K. Bewilogua & F. Richter) Polymer to Ceramic Transformation: Processing of Ceramic Bodies and Thin Films (G. Soraru & P. Colombo) MATERIALS AND APPLICATIONS Diamond Materials and their Applications (R. Caveney) Applications of Diamond Synthesized by Chemical Vapor Deposition (R. Sussmann) Diamond-like Carbon Films (C.-P. Klages & K. Bewilogua) Ceramics Based on Alumina: Increasing the Hardness for Tool Applications (A. Krell) Silicon Carbide Based Hard Materials (K. Schwetz) Silicon Nitride Based Hard Materials (M. Herrmann, et al.) Boride-Based Hard Materials (R. Telle, et al.) The Hardness of Tungsten Carbide-Cobalt Hardmetal (S. Luyckx) Data Collection of Properties of Hard Materials (G. Berg, et al.) Index

Stability of low-temperature amorphous silicon thin film transistors formed on glass and transparent plastic substrates

Abstract: This article describes the formation of amorphous silicon thin film transistors (TFTs) on glass and flexible transparent plastic substrates using rf plasma enhanced chemical vapor deposition and a maximum processing temperature of 110 °C. Silane diluted with hydrogen was used for the preparation of the amorphous silicon, and SiH4/NH3/N2 or SiH4/NH3/N2/H2 mixtures were used for the deposition of the silicon nitride gate dielectric. The amorphous silicon nitride layers were characterized by transmission infrared spectroscopy and current-voltage measurements; the plastic substrates were 10 mil thick (0.25 mm) polyethylene terephthalate sheets. Transistors formed using the same process on glass and plastic showed linear mobilities ranging from 0.1 to 0.5 cm2/V s with ION/IOFF ratios⩾107. To characterize the stability of the transistors on glass, n- and p-channel transconductances were measured before and after bias stressing. Devices formed at 110 °C show evidence of charge trapping near the a-Si/SiNx interfa...

Characterisation of Ti1−xSixNy nanocomposite films

Abstract: Ti 1− x Si x N y films were synthesised by RF reactive sputtering from Ti and Si elemental targets, in an Ar/N 2 gas mixture. XRD results revealed the development of a two-phase system, composed of a nanocrystalline f.c.c. TiN (phase 1: B1 NaCl type) and a second one (phase 2), where Si atoms replaced some of the Ti ones, inducing a structure that we may call a solid solution. An amorphous phase, supposed to be of silicon nitride, within grain boundaries seems to be also present, especially for high Si contents. TEM experiments confirmed the f.c.c.-type structure for phase 2, which is the only phase that develops without ion bombardment. The higher lattice parameter of phase 1 (∼0.429 nm compared to 0.424 nm for bulk TiN) may be explained by the residual stress effect on peak position. The Ti replacement by Si would explain the low value of the lattice parameter for phase 2 (∼0.418 nm). All samples showed good results for hardness (Hv≥30 GPa), and Ti 0.85 Si 0.15 N 1.03 at a deposition temperature of 300°C showed a value of approximately 47 Gpa, which is approximately double that of pure TiN. For higher deposition temperatures, an increase in hardness is observed, as demonstrated by this same sample, which at 400°C reveals a value of approximately 54 GPa. Similar behaviour was observed in adhesion, where this same sample revealed a critical load for adhesive failure of approximately 90 N. In terms of oxidation resistance, a significant increase has also been observed in comparison with TiN. At 600°C, the oxidation resistance of Ti 0.70 Si 0.30 N 1.10 is already 100 times higher than that of TiN. For higher temperatures this behaviour tends to be even better when compared with other nitrides.

Direct tunneling gate leakage current in transistors with ultrathin silicon nitride gate dielectric

Abstract: We present a study on the characterization and modeling of direct tunneling gate leakage current in both N- and P-type MOSFETs with ultrathin silicon nitride (Si/sub 3/N/sub 4/) gate dielectric formed by the jet-vapor deposition (JVD) technique. The tunneling mechanisms in the N- and PMOSFETs were clarified. The electron and hole tunneling masses and barrier potentials for the different tunneling mechanisms mere extracted from measured data using a new semi-empirical model. This model was used to project the scaling limits of the JVD Si/sub 3/N/sub 4/ gate dielectric based on the supply voltages for the various technology nodes and the maximum tolerable direct tunneling gate current for high-performance and low-power applications.

Experimental Evaluation of the Laser Assisted Machining of Silicon Nitride Ceramics

Abstract: To assess the feasibility of the laser assisted machining (LAM) process for the machining of difficult-to-machine materials such as structural ceramics, experiments were performed on silicon nitride workpieces for a wide range of operating conditions. Data for cutting forces and surface temperatures indicate that the lower bound of the material removal temperature for avoidance of cutting tool and/or workpiece fracture corresponds to the YSiAlON glass transition temperature (920-970°C). As temperatures near the cutting tool increase to values above the glass transition temperature, the glassy phase softens, facilitating visco-plastic flow and, correspondingly, the production of semi-continuous or continuous chips. The silicon nitride workpiece machined had a surface roughness of R a =0.39 μm at the nominal LAM operating condition. Examination of the machined surfaces and chips reveals no detectable sub-surface cracking or significant changes in | microstructure, respectively. Relative to grinding, the most significant advantage of LAM is its ability to achieve much larger material removal rates with high workpiece surface quality and reasonable levels of tool wear.

Detailed characterization of anodic bonding process between glass and thin-film coated silicon substrates

Abstract: Anodic bonding between Si-based and glass substrates has been characterized in detail. The effects of magnitude of the applied voltage, surface properties (coating of Si substrate), and surface cleanliness (pre-bonding cleaning procedure) on the time required for complete bonding were thoroughly studied. First, the generic bonding time versus applied voltage plot was found to be concave in shape (viewed from the origin). For bonding between p-type Si substrate and Corning 7740 glass pre-cleaned with acetone, the time required was cut down from 38 to 4 min if the applied voltage was increased from 200 to 500 V. Second, the bonding time required for five Si-based substrates in ascending order was determined to be Si (p-type), polysilicon, silicon nitride, silicon oxide and then Si (n-type). Third, the bonding between p-type Si substrate, pre-cleaned with H2SO4–H2O2 and HF, and Corning 7740 glass was completed within 1 min, which was much faster than that pre-cleaned with acetone (4 min). Finally, from bonding point of view, Corning 7740 glass was superior to Corning 7059 glass and Fisher slide due to its thermal coefficient of expansion matching with the underlying Si substrate and the presence of significant amount of sodium ions in the glass.

Glazing provided with a stack of thin layers acting on solar radiation

Abstract: The invention concerns a transparent substrate provided with a stack of thin layers acting on solar radiation. The stack comprises a functional metal layer (Nb, Ta, Zr) or said metal nitride, and a top layer made of aluminium nitride or oxynitride and/or silicon nitride or oxynitride.

Spinel‐Si3N4: Multi‐Anvil Press Synthesis and Structural Refinement

Abstract: The third known polymorph of silicon nitride, which is cubic and was only recently discovered, has been prepared from two further, different precursors—Si2N2(NH) and a-Si3N4—in a high-pressure, high-temperature synthesis using multi-anvil presses The synthesis and characterization of the products is described, which included a structural determination by Rietveld refinement of powder X-ray diffraction data Spinel-type c-Si3N4 is significantly harder than the α and β phases and may possibly find applications as an ultrahard material

A comparative study on inductively-coupled plasma high-density plasma, plasma-enhanced, and low pressure chemical vapor deposition silicon nitride films

Abstract: Silicon nitride films have been deposited using inductively-coupled plasma high-density plasma chemical vapor deposition (HDP CVD), plasma-enhanced chemical vapor deposition (PECVD), and low pressure chemical vapor deposition (LPCVD) methods. Characterization and comparison of the three films were performed using Fourier-transform infrared spectroscopy, secondary-ion mass spectroscopy, Rutherford backscattering spectrometry, and hydrogen forward-scattering spectrometry, in addition to wet-etch rate and stress measurement studies. It was found that silicon nitride films deposited using HDP CVD method have several advantages over the silicon nitride films that were deposited using the LPCVD and PECVD methods. The HDP CVD silicon nitride film can be deposited at much lower temperatures (⩽400 °C) than LPCVD silicon nitride, and has substantially less hydrogen (5.5 at. %) than the PECVD film. In addition, the PECVD film contains some oxygen in the film. The wet-etch rate of HDP CVD silicon nitride film is comp...

Deformation mechanisms and constitutive modeling for silicon nitride undergoing laser-assisted machining

Abstract: Material deformation behavior has been studied for silicon nitride containing 10 wt% of YSiAlON glass under laser-assisted machining (LAM). Material removal mechanisms were inferred from scanning electron microscopy observations of the chips, and the shear zone stress was determined using three-dimensional machining theory with a new approach to determining shear angles for segmented chips formed in LAM. The effects of operating conditions on the shear zone stress were determined from an experimental parametric study, and the results were used to develop a constitutive equation for the deformation process.

Slurry for chemical mechanical polishing silicon dioxide

Abstract: A new slurry for shallow trench isolation (STI) processing in the chemical mechanical planarization (CMP) in microelectronic industry comprising an aqueous medium having an abrasive; and a compound which has a carboxylic group and an electrophilic functional group. The combination of ceria and/or titania with amino acids to obtain polishing selectivity's greater than 5:1. CMP is used for removing the excess oxide and planarizing the substrate and the trench. The silicon nitride acts as a stop layer, preventing the polishing of underlying silicon substrate.

Fabrication of a shallow trench isolation by plasma oxidation

Abstract: The present invention provides a method of fabricating a STI on a wafer to eliminate the common occurrence of junction leakage in the prior art. The method begins by forming a patterned hard mask on a silicon substrate. The patterned hard mask is a laminated layer comprising a pad oxide and a silicon nitride layer, and exposes a portion of the surface of the silicon substrate. The exposed portion of the silicon substrate is then dry etched to form a trench in the silicon substrate having a surface and a surface. Next, a portion of the pad oxide is wet etched around the STI corners of the trench to expose a portion of the top surface of the silicon substrate surrounding the periphery of the trench. A microwave-excited Kr/O 2 plasma is used to oxidize both the interior surface of the trench and the exposed top surface of the silicon substrate located beneath the layer of silicon nitride surrounding the periphery of the trench at a temperature of 400° C. to form a silicon dioxide liner of uniform thickness on the STI surfaces and surface. Finally, an insulating material, such as HDP oxide, is deposited on the silicon substrate to fill in the trench followed by a chemical-mechanical polishing.

Packaging systems and methods for thin film solid state batteries

Abstract: A thin film battery having a protective package that provides a heat-resistant, hermetic seal for the thin film battery. A thin film battery includes thin film layers of components such as a cathode current collector, a cathode, an electrolyte, an anode, and an anode current collector built up on a substrate. Layers of dielectric material are positioned over the thin film battery. Suitable dielectric materials include aluminum oxide, silicon dioxide, silicon nitride, silicon carbide, tantalum oxide, diamond, and diamond-like-carbon. The dielectric materials are annealed. A layer of epoxy is positioned completely over all layers of the thin film battery and cured under ultraviolet light. Finally, the epoxy is annealed. The resultant thin film battery has a package that provides protection from the atmosphere, high temperatures, undesirable gases and can withstand processes utilized in the semiconductor and other industries to produce printed circuit boards with surface mounted thin film batteries.

Method for depositing a silicon nitride layer

Abstract: The present invention relates to a method for depositing a silicon nitride layer in which a NH 3 treatment is performed in a LPCVD chamber having a high pressure valve under operational conditions of high pressure and low temperature. This has the effect of shortening a total operational time required for the NH 3 treatment without any decrease in the effectiveness of nitridation. It can also prevent a loss in the operational time in the process of depositing a silicon nitride layer. The method includes the steps of: placing a wafer having an oxide layer in an LPCVD chamber having a high pressure valve under operational conditions of high pressure (for instance, 5˜300 Torr) and low temperature (for instance, 670±50° C.); performing an NH 3 treatment on the wafer; and depositing a silicon nitride layer on the wafer at the same temperature as the NH 3 treatment is performed at.

Method for forming a gate insulating film for semiconductor devices

Abstract: A method for forming a gate insulating film for a semiconductor device comprising forming an insulating film of silicon nitride or silicon oxynitride in the active regions of the semiconductor substrate; forming an amorphous TaON insulating film on the insulating film; and crystallizing the amorphous TaON insulating film. Using TaON as the primary gate insulating film provides a high dielectric constant (∈=20˜25), and thus produces a gate insulating film having properties superior to those possible with silicon dioxide gate films and thus more suitable for use in highly integrated semiconductor devices.

Device structure for storing charge and method therefore

Abstract: A semiconductor device structure for storing charge has a silicon nitride layer, in which a plurality of nanoclusters are sandwiched between oxide layers. The nanoclusters and the silicon nitride make up a storage region, which is particularly useful in non-volatile memories. The nanoclusters provide a repository for holes or electrons that jump from trap to trap in the silicon nitride when the silicon nitride is heated. This results in much of the charge, which would normally leak off from the silicon nitride at high temperatures, remaining in the storage region due to trapping in the nanoclusters. The silicon nitride layer with nanoclusters therein is formed by depositing a silicon nitride layer, then nanoclusters, and then another silicon nitride layer or by depositing a silicon-rich silicon nitride layer and subsequent heating to cause it to transform to a regular silicon nitride layer with silicon nanoclusters therein.

Microstructures comprising silicon nitride layer and thin conductive polysilicon layer

Abstract: Surface micromachined structures having a relatively thick silicon nitride layer and a relatively thin conductive polysilicon layer bonded together. Preferably, the silicon nitride layer and conductive polysilicon layer are made in the same low pressure chemical vapor deposition (LPCVD) step. The polysilicon layer is thin enough compared to the silicon nitride layer so that the mechanical properties of the microstructure are primarily determined by the silicon nitride layer. This provides superior mechanical properties for many applications. The thin conductive polysilicon layer provides conductivity for the microstructure (silicon nitride is an electrical insulator). The polysilicon layer has a thickness less than ⅕ the thickness of the silicon nitride layer. Preferably, the polysilicon layer is much thinner than this. The polysilicon layer can be located on a top surface or bottom surface of the silicon nitride layer. Also, the polysilicon layer can be located within the silicon nitride layer. Alternatively, the polysilicon layer covers the sidewalls of the silicon nitride layer, or completely encloses the silicon nitride layer.

Thin Film Cracking and Ratcheting Caused by Temperature Cycling

Abstract: Layered materials are susceptible to failure upon temperature cycling This paper describes an intriguing mechanism: cracking in a brittle layer caused by ratcheting in an adjacent ductile layer For example, on a silicon die directly attached to an organic substrate, cracking often occurs in the silicon nitride film over aluminum pads The silicon die and the organic substrate have different thermal expansion coefficients, inducing shear stresses at the die corners Aided by cycling temperature, the shear stresses cause ratcheting in the aluminum pads Incrementally, the stress relaxes in the aluminum pads and builds up in the overlaying silicon nitride film, leading to cracks

Method of making an ultra thin silicon nitride film

Abstract: Various methods of fabricating a circuit structure utilizing silicon nitride are provided. In one aspect, a method of fabricating a circuit structure is provided that includes forming a silicon nitride film on a silicon surface, annealing the silicon nitride film in an ammonia ambient and annealing the silicon nitride film in a nitrous oxide ambient to form a thin oxide layer at an interface between the silicon nitride film and the silicon surface. The process of the present invention enables the manufacture of thin silicon nitride films with highly uniform morphology for use as gate dielectrics or other purposes. The thin oxide film is self-limiting in thickness and improves differential mechanical stresses.

Flexible circuits with static discharge protection and process for manufacture

Abstract: Circuit and circuit carries include a dielectric substrate having a conductive layer mounted thereon. The conductive layer is patterned to define a plurality of spaced apart conductive elements. A static charge dissipative layer is in contact with and extending between at least two of the conductive elements. The static charge dissipative layer has a surface resistivity of between about 1×105 and about 1×1010 ohms/□. The static charge dissipative layer is made of a material selected from the group consisting of diamond-like carbon, silicon nitride, boron nitride, boron trifluoride, silicon carbide and silicon dioxide. Circuits and circuit carriers according to the present invention allow static charges to be controllably and reliably dissipated from a surface of the circuit or circuit carrier such that the potential for damage from static discharge to electrical components connected to the circuit is reduced.