Showing papers on "Voltage drop published in 2015"
TL;DR: In this article, a direct cell-to-cell battery equalizer based on quasi-resonant LC converter (QRLCC) and boost dc-dc converter (BDDC) is proposed.
Abstract: In conventional equalizers, the facts of bulky size and high cost are widespread. Particularly, the zero-switching loss and zero-voltage gap (ZVG) between cells are difficult to implement due to the high-frequency hard switching and the voltage drop across power devices. To overcome these difficulties, a direct cell-to-cell battery equalizer based on quasi-resonant LC converter (QRLCC) and boost dc-dc converter (BDDC) is proposed. The QRLCC is employed to gain zero-current switching, leading to a reduction of power losses. The BDDC is employed to enhance the equalization voltage gap for large balancing current and ZVG between cells. Moreover, through controlling the duty cycle of the BDDC, the topology can online adaptively regulate the equalization current according to the voltage difference, which not only effectively prevents overequalization but also abridges the overall balancing time. Instead of a dedicated equalizer for each cell, only one balancing converter is employed and shared by all cells, reducing the size and implementation cost. Simulation and experimental results show the proposed scheme exhibits outstanding balancing performance, and the energy conversion efficiency is higher than 98%. The validity of the proposed equalizer is further verified by a quantitative and systematic comparison with the existing active balancing methods.
227 citations
TL;DR: A strategy that employs an adaptive voltage droop control to achieve accurate reactive power sharing is investigated, and the effectiveness of the proposed strategy is demonstrated on a 1.2 kVA prototype microgrid.
Abstract: In this paper, a strategy that employs an adaptive voltage droop control to achieve accurate reactive power sharing is investigated. Instead of controlling the output voltage of the inverter directly, the voltage droop slope is tuned to compensate for the mismatch in the voltage drops across feeders by using communication links. If the communication channel is disrupted, the controller will operate with the last tuned droop coefficient, which is shown to still outperform the controller with the initial fixed droop coefficient. Also, the net control action of the adaptive droop terms is demonstrated to have a negligible effect on the microgrid bus voltage. Since communication is not used within the tuning control loop, the strategy is inherently immune to delays in communication links. A small-signal model of the proposed controller is presented, and the effectiveness of the proposed strategy is demonstrated on a 1.2 kVA prototype microgrid.
150 citations
TL;DR: In this article, a unified compensation framework is proposed using the common load condition in local controller, to compensate the voltage drop and load sharing errors in low-voltage DC microgrid.
97 citations
TL;DR: This paper investigates the real-time control and energy management of a dc microgrid incorporating hybrid energy sources with various loading schemes and shows that the developed EMS with AEC technique properly share the power and control the bus voltage under different loading conditions, while the adverse effects of the pulse load are highly reduced.
Abstract: This paper investigates the real-time control and energy management of a dc microgrid incorporating hybrid energy sources with various loading schemes. In the proposed dc microgrid, a supercapacitor bank, a power buffer, and a pulse load are directly connected to a dc bus. The proposed system configuration highly improves the grid redundancy and reduces the total power losses. Moreover, the supercapacitor bank not only supplies the pulse load, but also supports the grid during transient periods when it is highly loaded. However, the energy management and control of such a system is more complex, since the heavy pulse load can cause high power pulsation and voltage drop. To reduce the adverse effects of the pulse load, a new real-time energy management system (EMS) with an adaptive energy calculator (AEC) based on the moving average measurement technique is developed. The proposed microgrid was implemented in hardware and experimentally tested. The results were compared with other methods, such as direct voltage control and continuous current averaging approaches. The results show that the developed EMS with AEC technique properly share the power and control the bus voltage under different loading conditions, while the adverse effects of the pulse load are highly reduced.
96 citations
TL;DR: A new family of high efficiency dc/ac grid-tied inverter with a wide variation of input dc voltage with a “boost in boost, buck in buck” inverter, meaning that only one power stage works at high frequency in order to achieve minimum switching loss.
Abstract: This paper presents a new family of high efficiency dc/ac grid-tied inverter with a wide variation of input dc voltage. It is a “boost in boost, buck in buck” inverter, meaning that only one power stage works at high frequency in order to achieve minimum switching loss. The minimum voltage drop of the filtering inductor in the power loop is achieved to reduce the conduction power loss in both “boost” and “buck” mode. The principle of operation is demonstrated through the analysis on the equivalent circuits of a “half-bridge” single-phase inverter. The theoretical analysis shows that when input dc voltage is larger than the magnitude of the ac voltage, it is a voltage-source inverter, and on the contrary it is current-source inverter in the other mode. A 220 V/50 Hz/ 2000 W prototype has been constructed. Simulations and experiments show that it has a good control and system performance.
95 citations
TL;DR: The proposed inverter is able to generate the desired voltage levels using a lower number of circuit devices, including power semiconductor switches and related gate driver circuits of switches, as a result, the total cost is considerably reduced, and the control scheme gets simpler.
Abstract: In this paper, an advanced configuration for a symmetric multilevel voltage source inverter is proposed. The authority of the proposed inverter versus the conventional cascaded H-bridge inverter and those most recently introduced is verified with provided comparisons. The proposed inverter is able to generate the desired voltage levels using a lower number of circuit devices, including power semiconductor switches and related gate driver circuits of switches. As a result, the total cost is considerably reduced, and the control scheme gets simpler. Moreover, the reduced amount of on-state switches in the suggested configuration decreases voltage drops. Furthermore, power losses are diminished. The given simulation results confirm the feasibility of the proposed configuration. To approve the practicability of the proposed inverter, a prototype of the proposed topology has been implemented. Finally, simulation and experimental results are compared, and the provided comparison shows that the obtained results are in good agreement.
92 citations
TL;DR: In this study, a novel transformer based cascaded multilevel inverter is presented that benefits from the advantages such as reduced number of power switches and reduced total peak inverse voltage of the switching components.
Abstract: In this study, a novel transformer based cascaded multilevel inverter is presented. The proposed inverter can operate in both symmetric and asymmetric topologies. The presented inverter benefits from the advantages such as reduced number of power switches and reduced total peak inverse voltage of the switching components. The numbers of insulated gate driver circuits are also decreased with respect to the power switches. Furthermore, the presented topology requires just a single DC source. In addition, the numbers of on-state switches in the current paths are reduced. Therefore the voltage drops across the switches are mitigated and as a result the efficiency of the presented inverter is improved. The mentioned advantages cause the implementation cost to be reduced. The operation of the converter is discussed thoroughly for both symmetric and asymmetric operations. The feasibility of the presented inverter topology is validated using the simulation results. Experimental results under 1.5 kW are also added to justify the theoretical analyses.
74 citations
29 Oct 2015
TL;DR: In this article, two different overcurrent protection (OCP) circuits are designed and applied to the SiC MOSFETs for fault handling, and the desaturation method is successfully tested with a hardware solution substituting the blanking time delay.
Abstract: In this paper, the short-circuit (SC) performance of two different SiC MOSFETs is experimentally investigated for different input voltages, biasing voltages and case temperatures. The measurement results are compared to simulations, and a good agreement is achieved. For fault handling, two different overcurrent protection (OCP) circuits are designed and applied to the SiC MOSFETs. The desaturation method is successfully tested with a hardware solution substituting the blanking time delay. The second method is based on sensing the voltage drop across the parasitic inductance at the source pin. The experimental and simulation results show that both OCP methods have the capability to detect a short circuit condition in the SiC MOSFET within safe SC time avoiding device failure.
74 citations
21 Jun 2015
TL;DR: In this article, an air-cooled 1MW bi-directional DC Solid State Circuit Breaker (SSCB) based on recently developed 91mm, 25kV Reverse Blocking-IGCT (RB-ICT) has been designed and optimized to have very low conduction losses, less than 1kW at 1kA.
Abstract: In this paper, we present the development of an air-cooled 1MW bi-directional DC Solid State Circuit Breaker (SSCB) based on recently developed 91mm, 25kV Reverse Blocking-IGCT (RB-IGCT) The power electronic switch (RB-IGCT) has been designed and optimized to have very low conduction losses, less than 1kW at 1kA (on-state voltage drop 65kA at 16kV, 400K) which are the most important concerns of semiconductor based circuit breaker We also present the simulation and experimental results at the system level ie analyzed the influence of the Surge Arrester (SA) on the over-voltage transients during current interruption We also analyzed the thermal management for the newly developed SSCB using ANSYS Icepak and validated experimentally
62 citations
TL;DR: Quantitative results reveal that microvortices set in with an excess voltage drop and sustain an approximately constant electrical conductivity, destroying the initial ICP with significantly low viscous dissipation.
Abstract: We investigate the coupled dynamics of the local hydrodynamics and global electric response of an electrodialysis system, which consists of an electrolyte solution adjacent to a charge selective membrane under electric forcing. Under a dc electric current, counterions transport through the charged membrane while the passage of co-ions is restricted, thereby developing ion concentration polarization (ICP) or gradients. At sufficiently large currents, simultaneous measurements of voltage drop and flow field reveal several distinct dynamic regimes. Initially, the electrodialysis system displays a steady Ohmic voltage difference (ΔV ohm ) , followed by a constant voltage jump (ΔV c ) . Immediately after this voltage increase, microvortices set in and grow both in size and speed with time. After this growth, the resultant voltage levels off around a fixed value. The average vortex size and speed stabilize as well, while the individual vortices become unsteady and dynamic. These quantitative results reveal that microvortices set in with an excess voltage drop (above ΔV ohm +ΔV c ) and sustain an approximately constant electrical conductivity, destroying the initial ICP with significantly low viscous dissipation.
62 citations
TL;DR: In this article, the instantaneous voltage deviation of load buses is used to determine the frequency thresholds of LS relays and the higher frequency thresholds are assigned to the loads with larger voltage decay which are often located in the vicinity of disturbance location.
Abstract: Load shedding (LS) is the last firewall and the most expensive control action against power system blackout. In the conventional under frequency LS (UFLS) schemes, the load drop locations are already determined independently of the event location. Furthermore, the frequency thresholds of LS relays are prespecified and constant values which may not be a comprehensive solution for widespread range of possible events. This paper addresses the decentralized LS in which the instantaneous voltage deviation of load buses is used to determine the frequency thresholds of LS relays. The higher frequency thresholds are assigned to the loads with larger voltage decay which are often located in the vicinity of disturbance location. The proposed method simultaneously benefits from individual UFLS and under voltage LS (UVLS) features which operate in the power system without coordination. Numerical simulations in DigSilent PowerFactory software confirm the efficiency of proposed methodology in the stabilization of the power system after various severe contingencies.
27 Mar 2015
TL;DR: In this article, the authors evaluate various aspects of EV charging under a TOU schedule, with off-peak rates starting at hours ranging from 8 P.M. to 3 A.M., and find that the best time to begin the off peak rates is between 11 p.m. and 12 A.m., thus maximizing both grid and customer benefits.
Abstract: Analyses have shown that electric vehicle (EV) loads may considerably affect the secondary service voltage quality. One of the ways to mitigate voltage drop concerns is to use a time-of-use (TOU) pricing scheme. A TOU pricing scheme utilizes the off-peak generation for EV charging, thus deferring any immediate grid upgrade and improving the grid sustainability. This paper evaluates various aspects of EV charging under a TOU schedule, with off-peak rates starting at hours ranging from 8 P.M. to 3 A.M. The study is conducted using an actual residential distribution circuit. A best practical time to begin the off-peak rates is determined so that the effects of EV charging on the secondary service voltages are minimized while ensuring that EVs are fully charged by 7 A.M., thus maximizing both grid and customer benefits. The analysis suggests that the best time to begin off-peak rates is between 11 P.M. and 12 A.M. Furthermore, the analysis also suggests that setting up TOU off-peak rates at the latter half of the peak load demand, for example, at 8 P.M., is detrimental to the distribution circuit voltage quality. The result indicates that the existing utility TOU scheme may exacerbate voltage drop problems due to EV load charging.
TL;DR: A novel traction electrical-network load-flow algorithm using modified nodal analysis (MNA) is described in detail, which allows an intuitive representation of network elements such as trains and substations and a direct solution of substation currents.
Abstract: The objective of this paper is to analyze the potential benefits of flywheel energy storage for dc light rail networks, primarily in terms of supply energy reduction, and to present the methods used. The method of analysis is based on train movement and electrical-network load-flow simulation. The results of the analysis indicate potential energy saving of up to 21.6% due to the introduction of the flywheel energy storage. The energy saving effects of receptivity (or energy transfer from one train to another) are also considered. Additional benefits of the flywheel energy storage in terms of voltage drop improvements of 29.8% and a reduction in peak substation power loading of 30.1% are demonstrated in a test case scenario. A novel traction electrical-network load-flow algorithm using modified nodal analysis (MNA) is described in detail. This allows an intuitive representation of network elements such as trains and substations and a direct solution of substation currents.
TL;DR: In this article, density functional theory is applied to investigate how the applied voltage is manifested as changes in the double layer at atomic length scales, including charge separation and interfacial dipole moments.
Abstract: Battery electrode surfaces are generally coated with electronically insulating solid films of thickness 1–50 nm. Both electrons and Li+ can move at the electrode–surface film interface in response to the voltage, which adds complexity to the “electric double layer” (EDL). We apply Density Functional Theory (DFT) to investigate how the applied voltage is manifested as changes in the EDL at atomic length scales, including charge separation and interfacial dipole moments. Illustrating examples include Li3PO4, Li2CO3, and LixMn2O4 thin films on Au(111) surfaces under ultrahigh vacuum conditions. Adsorbed organic solvent molecules can strongly reduce voltages predicted in vacuum. We propose that manipulating surface dipoles, seldom discussed in battery studies, may be a viable strategy to improve electrode passivation. We also distinguish the computed potential governing electrons, which is the actual or instantaneous voltage, and the “lithium cohesive energy”-based voltage governing Li content widely reported...
TL;DR: In this article, Li-ion capacitors were made with activated carbon cathode and hard carbon anode with different loadings of stabilized lithium metal powder (SLMP) for charge and discharge.
TL;DR: The work presented herein can potentially serve as an alternative paper-based display system for resistive sensors in instances where cost and weight is a premium and the advantages of using paper are compromised.
Abstract: Paper-based sensors are gaining increasing attention for their potential applications in resource-limited settings and for point-of-care analysis. However, chemical analysis of paper-based electronic sensors is frequently interpreted using complex software and electronic displays which compromise the advantages of using paper. In this work, we present two semiquantitative paper-based readout systems that can visually measure a change in resistance of a resistive-based sensor. The readout systems use electrochromic Prussian blue/polyaniline as an electrochromic indicator on a resistive gold nanoparticle film that is fabricated on paper. When the readout system is integrated with a resistive sensor in an electrical circuit, and a voltage is applied, the voltage drop along the readout system varies depending on the sensor's resistance. Due to the voltage gradient formed along the gold nanoparticle film, the overlaying Prussian blue/polyaniline will change color at voltages greater than its reduction voltage (green/blue for oxidized state and transparent for reduced state). Thus, the changes in resistances of a sensor can be semiquantified through color visualization by either measuring the length of the transparent film (analog readout system) or by counting the number of transparent segments (digital readout system). The work presented herein can potentially serve as an alternative paper-based display system for resistive sensors in instances where cost and weight is a premium.
TL;DR: In this paper, the authors presented the simulation and experimental results of the newly developed 2.5 kV reverse blocking-integrated gate commutated thyristor (RB-IGCT) which has been designed and optimised to have very low conduction losses and high turn-off current capability for DC solid state circuit breaker (SSCB) applications.
Abstract: This study presents the simulation and experimental results of the newly developed 2.5 kV reverse blocking-integrated gate commutated thyristor (RB-IGCT) which has been designed and optimised to have very low conduction losses and high turn-off current capability for DC solid state circuit breaker (SSCB) applications. The device has been optimised through anode engineering, thickness and resistivity to achieve the required blocking capability of 2.5 kV and to have very low conduction losses below 1 kW at 1 kA, that is, the on-state voltage drop is as low as 0.9 V at 1 kA. This study also presents the simulation and experimental results at the system level including the influence of the surge arrester (SA) which is connected in parallel to the RB-IGCT to clamp the overvoltage and to absorb the energy stored in the system inductance at the current interruption. The influence of different voltage rating SAs and parallel combination of SAs on the switching behaviour of the RB-IGCT has been investigated. A bi-directional SSCB for 1 MW application based on 2.5 kV RB-IGCT has been built successfully. The device simulations show that the results are in good agreement with the measurement results both at the device and system levels.
TL;DR: In this article, the authors proposed a PBO-PSOI structure for LDMOSFETs with periodic buried oxide layer (PBO) for enhancing breakdown voltage and self-heating effects (SHEs).
TL;DR: In this paper, the authors compared two MOS based UHV 4H-SiC power switching devices; 15 kV 4h-siC MOSFETs and 15 kv 4hSiC n-IGBTs, and showed a specific on-resistance of 204 mΩ cm2 at 25 °C, which increased to 570 m Ω cm 2 at 150 °C. They also showed that the use of a carrier storage layer (CSL) can significantly improve the conduction performance of the 15kV 4 h-Si
Abstract: Ultra high voltage (UHV, >15 kV) 4H-silicon carbide (SiC) power devices have the potential to significantly improve the system performance, reliability, and cost of energy conversion systems by providing reduced part count, simplified circuit topology, and reduced switching losses. In this paper, we compare the two MOS based UHV 4H-SiC power switching devices; 15 kV 4H-SiC MOSFETs and 15 kV 4H-SiC n-IGBTs. The 15 kV 4H-SiC MOSFET shows a specific on-resistance of 204 mΩ cm2 at 25 °C, which increased to 570 mΩ cm2 at 150 °C. The 15 kV 4H-SiC MOSFET provides low, temperature-independent, switching losses which makes the device more attractive for applications that require higher switching frequencies. The 15 kV 4H-SiC n-IGBT shows a significantly lower forward voltage drop (VF), along with reasonable switching performance, which make it a very attractive device for high voltage applications with lower switching frequency requirements. An electrothermal analysis showed that the 15 kV 4H-SiC n-IGBT outperforms the 15 kV 4H-SiC MOSFET for applications with switching frequencies of less than 5 kHz. It was also shown that the use of a carrier storage layer (CSL) can significantly improve the conduction performance of the 15 kV 4H-SiC n-IGBTs.
TL;DR: In this paper, the influence of nonlinear frequency coupling in an oxygen plasma excited by two odd harmonics at moderate pressure was investigated using a numerical model through variations in the voltage ratio and phase shift between the frequency components.
Abstract: The influence of nonlinear frequency coupling in an oxygen plasma excited by two odd harmonics at moderate pressure is investigated using a numerical model. Through variations in the voltage ratio and phase shift between the frequency components changes in ionization dynamics and sheath voltages are demonstrated. Furthermore, a regime in which the voltage drop across the plasma sheath is minimised is identified. This regime provides a significantly higher ion flux than a single frequency discharge driven by the lower of the two frequencies alone. These operating parameters have potential to be exploited for plasma processes requiring low ion bombardment energies but high ion fluxes.
TL;DR: In this paper, an adaptive distance protection scheme is proposed to improve the performance of the conventional distance protection under high-resistance fault, which is based on the geometric distribution characteristics of voltage and current in the system.
Abstract: In order to improve the performance of the conventional distance protection scheme under high-resistance fault, an adaptive distance protection scheme is proposed in this paper. First, according to the geometric distribution characteristics of voltage and current in the system, the equation of voltage drop from the relaying point to the fault point is established. Second, the fault point is determined by the measured current and the measured negative-sequence current. And then, the new adaptive distance protection criterion is formed according to the relationship between the fault point and the protection zone. Simulation tests on the Real Time Digital Simulator verify that the proposed scheme is able to modify the protection setting value adaptively online, and is immune to the impact of transition resistance and load current. Besides, it has the potential to be applied in a real power system because of small computation amount and high accuracy.
TL;DR: A Mn-porphyrin was contacted on Au(111) in a low-temperature scanning tunneling microscope (STM) and differential conductance spectra show a zero-bias resonance that is due to an underscreened Kondo effect according to many-body calculations.
Abstract: Small changes in the configuration of a molecule can significantly influence its resistive behavior in a circuit.
TL;DR: In this article, a new optimization procedure is proposed to find the optimal droop parameters such that the effect of the line impedances is minimized, where the particle swarm-based technique is used to provide a solution for this optimization problem.
Abstract: Droop control method is a widely used technique for achieving load sharing in DC microgrid applications. Virtual output impedance (or droop gain) and voltage reference are the main control parameters typically selected based on the power ratings of the sources for proper load sharing. The performance of droop controller is affected significantly by the voltage drops across the transmission line impedances, resulting in a load sharing error and voltage degradation across the microgrid. In this article, a new optimization procedure is proposed to find the optimal droop parameters such that the effect of the line impedances is minimized. An optimization problem along with the required constrains is formulated as the combination of current sharing errors as well as the voltage degradation for various loading conditions. Particle swarm-based technique is then used to provide a solution for this optimization problem. The performance of the droop controller with the optimal droop parameters is verified t...
TL;DR: In this paper, a new droop-based reactive power control strategy is proposed that is suitable for implementation in autonomous low voltage microgrids, which exploits the potentials of adding a dynamic virtual inductance loop to compensate for the voltage drop differences caused by line impedances.
TL;DR: In this paper, a fully integrated and battery-free 90 nm interface circuit for ac/dc conversion and step up of low-voltage ac signals generated by electromagnetic (EM) energy harvesters is presented.
Abstract: This paper presents a fully integrated and battery-free 90 nm interface circuit for ac/dc conversion and step up of low-voltage ac signals generated by electromagnetic (EM) energy harvesters. The circuit is composed of two stages: The rectifier in the first stage utilizes an improved ac/dc doubler structure with active diodes internally powered by a passive ac/dc doubler and custom-designed comparators to minimize the voltage drops. With this, the efficiency is enhanced to 67% while providing 0.61 V to 40 μA load. The second stage is a dc/dc converter utilizing a low-voltage charge pump with an on-chip ring oscillator for further voltage step up. The rectifier stage is functional down to 125 mV input peak voltage, and the full interface circuit can maintain more than 1 V dc at 1 MΩ load for input peak voltages higher than 0.4 V. The circuit delivers 2.48 V to a 4.4 MΩ load, when interfaced to an in-house EM harvester, operating under 10 Hz, 0.5 g vibration.
TL;DR: In this article, the authors investigated the effect of crystal domain orientation and boundary on the charge transport of an operating device with copper phthalocyanine (CuPc) thin films grown on p-sexiphenyl (p-6P) by Kelvin probe force microscopy.
Abstract: Conduction of electric charges is often done in polycrystalline materials. Unavoidably, the crystallite size, orientation, and domain boundaries (DBs) affect the transport of the charge carriers. It is particularly so for organic semiconductors known to be highly anisotropic and strongly dependent on DBs. Understanding those effects will have a strong impact on improving the performance of organic electronic and optoelectronic devices. Herein, we report our investigation on the crystal-domain orientation and boundary on the charge transport of operating device with copper phthalocyanine (CuPc) thin films grown on p-sexiphenyl (p-6P) by Kelvin probe force microscopy. In CuPc intradomains, the voltage drop increases as the angle increases between the domain orientation and the source-drain electric field. In DBs, the potential wells and steep voltage drops were observed. The increase of the DBs width and the angle between the orientations of neighboring domains results in the raise of voltage drop across th...
07 Jun 2015
TL;DR: In this article, a novel arc detection method is proposed, which detects the load side input voltage drop due to the initial electrode specific minimum arc voltage, which can be extinguished by shutting down the load's power electronics converter.
Abstract: Due to the absence of current zero crossing, dc arcs do not extinguish as easily as ac ones. It is essential to detect and eliminate series arc faults in dc microgrids in order to ensure safety, particularly while unplugging loads. Several detection and extinction methods using various means are known in literature. In this paper a novel arc detection method is proposed. It detects the load side input voltage drop due to the initial electrode specific minimum arc voltage. Only the local input voltage has to be measured and selectivity is given. The arc can be extinguished by shutting down the load's power electronics converter. The proposed method is elaborated through simulation of arc behaviour for constant resistor and constant power loads with input capacitors. First experimental results correspond with the theoretical analysis.
TL;DR: In this paper, a continuous equivalent model of the MMC containing two ideal transformer models is presented, and the impact of a harmonic voltage upon the dc side is analyzed and the production mechanism of circulating harmonic currents is elucidated.
Abstract: This paper focuses on analysis and suppression of circulating harmonic currents in a modular multilevel converter (MMC) considering the impact of dead time in medium-voltage applications. A continuous equivalent model of the MMC containing two ideal transformer models is presented. Using this model, the impact of a harmonic voltage upon the dc side is analyzed and the production mechanism of circulating harmonic currents is elucidated. At the same time, the impact of dead time and insulated gate bipolar transistor (IGBT) voltage drop (DTVD) is studied, which indicates that capacitor voltages, output harmonics, and circulating harmonic currents are influenced. Based on this analysis, an open-loop control strategy to suppressing circulating harmonic currents caused by the output current and DTVD is presented. Finally, all these conclusions are verified using a simulation platform with 14 modules per arm fed by a 14-kV dc voltage source and a downscaled experimental platform with four modules per arm fed by a 560-V dc voltage source.
TL;DR: In this paper, the authors investigated the failure mechanism of the multilevel per cell (MLC) storage in one transistor and one resistor structure, and found some unexpected failed SET operations, which caused the shrinkage of the MLC margin.
Abstract: Multilevel per cell (MLC), achieved by controlling the compliance current during SET operation, is a common approach to realize high-density storage in resistive random access memory (RRAM). In this letter, we investigated the failure mechanism of the MLC storage in one transistor and one resistor structure. By commonly modulating the amplitudes of gate bias to achieve the MLC, we found some unexpected failed SET operations, which caused the shrinkage of the MLC margin. In situ monitoring of the dynamic voltage drops on both transistor and memory cell revealed that there was an abnormal rise of source potential of the transistor, resulting in the increase of threshold voltage of the access transistor. If the applied gate bias was below the increased threshold voltage, the transistor would not program the RRAM cell successfully. Finally, possible improvement approaches to solve this problem are suggested.
TL;DR: The theory, design, and experimental verification of the sensor up to a line voltage of 7.5 kVrms is described, which includes a method of calibrating the sensor such that blind voltage measurements can be made without knowing the exact geometry of the conductors.
Abstract: A single-contact voltage sensor designed for accurate measurements of ac voltages across a pair of conductors is described The sensor design is motivated by remote monitoring applications where accurate voltage measurement of high-voltage transmission lines is required The body of the sensor is electrically and mechanically attached to a single conductor: either the neutral or high-voltage conductor A capacitive sensing plate attached to the sensor creates a capacitive voltage divider by using the stray capacitance to the noncontacted line A very high-impedance buffer is used to measure the voltage across the divider output and estimate the line voltage An important part of this paper includes a method of calibrating the sensor such that blind voltage measurements can be made without knowing the exact geometry of the conductors Other important aspects of the design include a two-stage voltage divider for retaining accuracy and increasing the voltage range of the sensor The work is supported by extensive numerical simulation models which were used to determine the optimum design for the sensing plate and to evaluate the sensitivity to different configurations including conductor spacing and the height above ground For calibration values which are accurate to 1%, the line voltage can be measured with an accuracy of 10% The paper describes the theory, design, and experimental verification of the sensor up to a line voltage of 75 kVrms