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Alberto Sangiovanni-Vincentelli
Researcher at University of California, Berkeley
Publications - 946
Citations - 47259
Alberto Sangiovanni-Vincentelli is an academic researcher from University of California, Berkeley. The author has contributed to research in topics: Logic synthesis & Finite-state machine. The author has an hindex of 99, co-authored 934 publications receiving 45201 citations. Previous affiliations of Alberto Sangiovanni-Vincentelli include National University of Singapore & Lawrence Berkeley National Laboratory.
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Systems and methods for performing software performance estimations
TL;DR: In this paper, the authors present a method for annotating software with performance information, such as timing information, resource usage information, and hardware simulation model information, using assembler-level source code.
Journal ArticleDOI
Compositionally Progressive Solutions of Synchronous FSM Equations
Nina Yevtushenko,Tiziano Villa,Robert K. Brayton,A. Petrenko,Alberto Sangiovanni-Vincentelli +4 more
TL;DR: The paper addresses the problem of designing a component that combined with a known part of a system, called the context FSM, is a reduction of a given specification FSM by providing two different algorithms to compute a largest regular compositionally progressive solution.
Proceedings ArticleDOI
Strong model matching for finite state machines with non-deterministic reference model
TL;DR: A characterization of all feasible control laws is given and an efficient synthesis procedure is proposed for finding a controller for a given open loop system so that the resulting closed loop system matches one of several acceptable input-output behaviors described by a possibly non-deterministic FSM.
Journal ArticleDOI
Explainable AI for Chiller Fault-Detection Systems: Gaining Human Trust
Seshadhri Srinivasan,Pandarasamy Arjunan,Baihong Jin,Alberto Sangiovanni-Vincentelli,Zuraimi Sultan,Kameshwar Poolla +5 more
TL;DR: In this paper, the role of explainable artificial intelligence (XAI) for building trust in data-driven fault detection and diagnosis (FDD) has been investigated and use cases for XAI-FDD on a building in Singapore that has six chillers.
Proceedings ArticleDOI
On-chip communication design: roadblocks and avenues
TL;DR: Latency-insensitive design is a step in the direction of new methodologies that regard the chip as a distributed system and will have a major impact on the design of on-chip communication architectures, which increasingly rely on wire pipelining to go beyond the capabilities of traditional wire buffering.