Institution
National Institute of Technology, Meghalaya
Education•Shillong, India•
About: National Institute of Technology, Meghalaya is a education organization based out in Shillong, India. It is known for research contribution in the topics: Control theory & Computer science. The organization has 503 authors who have published 1062 publications receiving 6818 citations. The organization is also known as: NIT Meghalaya & NITM.
Papers
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TL;DR: This paper presents a discussion on p-adic multiframe by means of its wavelet structure, called as multiframelet, which is build upon $p-adic wavelet construction.
Abstract: This paper presents a discussion on $p$-adic multiframe by means of its wavelet structure, called as multiframelet, which is build upon $p$-adic wavelet construction. Multiframelets create much excitement in mathematicians as well as engineers on account of its tremendous potentiality to analyze rapidly changing transient signals. Moreover, multiframelets can produce more accurately localized temporal and frequency information, due to this fact it produce a methodology to reconstruct signals by means of decomposition technique. Various properties of multiframelet sequence in $L^{2}(\mathbb{Q}_{p})$ have been analyzed. Furthermore, multiframelet set in $\mathbb{Q}_{p}$ has been engendered and scrutinized.
1 citations
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02 Jan 2021TL;DR: In this article, a hybrid grey wolf and cuckoo search optimization algorithm has been used to formulate the congestion management problem in an effective way in the transmission line and the results are analyzed and compared with other results reported in the literature.
Abstract: Deregulation enforces several challenges and changes in the electricity market. The complexities of deregulated market along with exponential load growth impose threat to the transmission sector as well. Due to the growing trend in electricity demand, the power flows through the lines are violating their thermal limit which results in transmission congestion in the system. Independent system operator (ISO) chooses the alternate option so that congestion can be managed in an effective way. Generator rescheduling is one of the prime choices of ISO to manage congestion in deregulated market. In this work, congestion management considering rescheduling of real power of generator has been considered for transmission line. A hybrid grey wolf and cuckoo search optimization algorithm has been considered to formulate the congestion management problem in an effective way. The results are analyzed and compared with the other results reported in the literature. The modified IEEE 30 bus test system has been considered in the work of study.
1 citations
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01 Sep 2017TL;DR: An OpenFlow based traffic engineering mechanism named Proactive Traffic Engineering (ProTE) is presented, which uses proactive approach to assign optimal paths to flows in a multi-stage data center network by using polling mechanism which polls the edge and aggregation switches to collect statistics and perform flow scheduling after every few seconds.
Abstract: Today's data center topologies mostly comprise multi-rooted trees with many equal-cost paths between the (source, destination) node pairs. Equal Cost Multi-Path (ECMP) forwarding is extensively used to leverage the multipath diversity in data center networks. However, ECMP forwarding might reduce the overall throughput significantly because of the random hash collision between multiple large flows. In this paper, we present an OpenFlow based traffic engineering mechanism named Proactive Traffic Engineering (ProTE), which uses proactive approach to assign optimal paths to flows in a multi-stage data center network by using polling mechanism which polls the edge and aggregation switches to collect statistics and perform flow scheduling after every few seconds. The comparison of scheduling performance of ProTE against Hedera and ECMP shows that ProTE performs better than Hedera and ECMP.
1 citations
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01 Jan 2022••
01 Jan 2019TL;DR: The paper describes the architectures of various subranging flash analog-to-digital converters (ADCs) along with the proposal of a novel subranging algorithm and shows an overall improvement of power by 94% per conversion cycle as compared to flash ADC.
Abstract: The paper describes the architectures of various subranging flash analog-to-digital converters (ADCs) along with the proposal of a novel subranging algorithm. A comparative study of the state-of-the-art designs are made with respect to the figure of merit (FoM) and excess delay (EXD) parameter. Simulations are carried out in generic process design kit (GPDK) 45-nm technology in SPECTRE environment. The proposed subranging ADC shows an overall improvement of power by 94% per conversion cycle as compared to flash ADC. The EXD of proposed subranging ADC shows an improvement by 74% compared to binary flash ADC but however is slower than flash ADC by 34%.
Authors
Showing all 517 results
Name | H-index | Papers | Citations |
---|---|---|---|
Sudip Misra | 48 | 535 | 9846 |
Robert Wille | 43 | 457 | 6881 |
Paul C. van Oorschot | 41 | 150 | 21478 |
Sourav Das | 30 | 174 | 4026 |
Mukul Pradhan | 23 | 53 | 1990 |
Bibhuti Bhusan Biswal | 20 | 155 | 1413 |
Naba K. Nath | 20 | 39 | 1813 |
Atanu Singha Roy | 19 | 48 | 1071 |
Akhilendra Pratap Singh | 19 | 99 | 1775 |
Abhishek Singh | 19 | 107 | 1354 |
Vinay Kumar | 19 | 130 | 1442 |
Dipankar Das | 19 | 67 | 1904 |
Gayadhar Panda | 18 | 123 | 1093 |
Gitish K. Dutta | 16 | 26 | 1168 |
Kamalika Datta | 15 | 69 | 676 |