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Journal ArticleDOI

A 2.3 nJ/Frame Voice Activity Detector-Based Audio Front-End for Context-Aware System-On-Chip Applications in 32-nm CMOS

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TLDR
This paper presents an audio front-end with Voice Activity Detection (VAD) hardware targeted for low-power embedded SoCs, featuring a 512 pt FFT, programmable filters, noise floor estimator and a decision engine which has been fabricated in 32 nm CMOS.
Abstract
Advanced human-machine interfaces require improved embedded sensors that can seamlessly interact with the user. Voice-based communication has emerged as a promising interface for next generation mobile, automotive and hands-free devices. Presented here is such an audio front-end with Voice Activity Detection (VAD) hardware targeted for low-power embedded SoCs, featuring a 512 pt FFT, programmable filters, noise floor estimator and a decision engine which has been fabricated in 32 nm CMOS. The dual-VCC, dual-frequency design allows the core datapath to scale to near-threshold voltage (NTV), where power consumption is less than 50 uW. At peak energy efficiency, the core can process audio data at 2.3 nJ/frame - a 9.4X improvement over nominal voltage conditions.

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Citations
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Journal ArticleDOI

A 90 nm CMOS, $6\ {\upmu {\text{W}}}$ Power-Proportional Acoustic Sensing Frontend for Voice Activity Detection

TL;DR: In this article, the authors presented a new power-proportional sensing paradigm and the use of machine-learning-assisted moderate-precision analog analytics for classification of speech and non-speech.
Journal ArticleDOI

All-Digital Low-Dropout Regulator With Adaptive Control and Reduced Dynamic Stability for Digital Load Circuits

TL;DR: In this paper, a scan-programmable LDO macro in a low-power 0.13-μm technology operating down to 1.07×, the transistor $V_{{\rm TH}}$, and featuring greater than 90% current efficiency across a 50× current range was presented.
Journal ArticleDOI

A Low-Power Speech Recognizer and Voice Activity Detector Using Deep Neural Networks

TL;DR: It is argued that VADs should prioritize accuracy over area and power, and it is introduced a VAD circuit that uses an NN to classify modulation frequency features with 22.3-mW power consumption.
Journal ArticleDOI

A 32 nm Embedded, Fully-Digital, Phase-Locked Low Dropout Regulator for Fine Grained Power Management in Digital Circuits

TL;DR: This paper presents a fully-digital, phase locked LDO implemented in 32 nm CMOS, and the control model of the proposed design has been provided and limits of stability have been shown.
Journal ArticleDOI

Where Analog Meets Digital: Analog?to?Information Conversion and Beyond

TL;DR: An overview of the emerging field of analog-to-information conversion in light of various sub-Nyquist sampling techniques recently appearing in literature is given, to highlight some of the opportunities, challenges, and new applications such converters offer.
References
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Journal ArticleDOI

Real-valued fast Fourier transform algorithms

TL;DR: A new implementation of the real-valued split-radix FFT is presented, an algorithm that uses fewer operations than any otherreal-valued power-of-2-length FFT.
Journal ArticleDOI

Implementation of "Split-radix" FFT algorithms for complex, real, and real-symmetric data

TL;DR: This algorithm belongs to that class of recently proposed 2n-FFT's which present the same arithmetic complexity (the lowest among any previously published one) and can easily be applied to real and real-symmetric data with reduced arithmetic complexity by removing all redundancy in the algorithm.
Proceedings ArticleDOI

A 180mV FFT processor using subthreshold circuit techniques

TL;DR: Logic and memory design techniques allowing subthreshold operation are developed and demonstrated and the fabricated 1024-point FFT processor operates down to 180mV using a standard 0.18/spl mu/m CMOS logic process while using 155nJ/FFT at the optimal operating point.
Journal ArticleDOI

Microwatt Embedded Processor Platform for Medical System-on-Chip Applications

TL;DR: An embedded processor platform chip using an ARM Cortex-M3 suitable for mapping medical applications requiring microwatt power consumption is presented and the first sub-microwatt per channel electroencephalograph (EEG) seizure detection is demonstrated.
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