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Joodong Park

Researcher at Intel

Publications -  53
Citations -  1294

Joodong Park is an academic researcher from Intel. The author has contributed to research in topics: Transistor & Gate dielectric. The author has an hindex of 16, co-authored 53 publications receiving 1188 citations.

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Proceedings ArticleDOI

A 22nm SoC platform technology featuring 3-D tri-gate and high-k/metal gate, optimized for ultra low power, high performance and high density SoC applications

TL;DR: In this paper, a leading edge 22nm 3-D tri-gate transistor technology has been optimized for low power SoC products for the first time, and a low standby power 380Mb SRAM capable of operating at 2.6GHz with 10pA/cell standby leakages.
Proceedings ArticleDOI

RF CMOS technology scaling in High-k/metal gate era for RF SoC (system-on-chip) applications

TL;DR: In this article, the authors examined the impact of silicon technology scaling trends and associated technological innovations on RF CMOS device characteristics, and the application of novel strained silicon and high-k/metal gate technologies not only benefits digital systems, but significantly improves RF performance.
Proceedings ArticleDOI

A 65nm ultra low power logic platform technology using uni-axial strained silicon transistors

TL;DR: In this article, a leading edge 65nm logic process technology employing uni-axial strained silicon transistors has been optimized for ultra low power products, achieving record PMOS/NMOS drive currents of 038/066 mA/mum, respectively, at 12V and off-state leakage of 100 pA /mum.