J
Joodong Park
Researcher at Intel
Publications - 53
Citations - 1294
Joodong Park is an academic researcher from Intel. The author has contributed to research in topics: Transistor & Gate dielectric. The author has an hindex of 16, co-authored 53 publications receiving 1188 citations.
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Proceedings ArticleDOI
A 22nm SoC platform technology featuring 3-D tri-gate and high-k/metal gate, optimized for ultra low power, high performance and high density SoC applications
Chia-Hong Jan,Uddalak Bhattacharya,Ruth A. Brain,S.-J. Choi,G. Curello,G. Gupta,Hafez Walid M,M. Jang,M. Kang,K. Komeyli,T. Leo,Nidhi Nidhi,L. Pan,Joodong Park,Kinyip Phoa,Abdur Rahman,C. Staus,H. Tashiro,Curtis Tsai,P. Vandervoorn,L. Yang,J.-Y. Yeh,P. Bai +22 more
TL;DR: In this paper, a leading edge 22nm 3-D tri-gate transistor technology has been optimized for low power SoC products for the first time, and a low standby power 380Mb SRAM capable of operating at 2.6GHz with 10pA/cell standby leakages.
Proceedings ArticleDOI
A 32nm SoC platform technology with 2 nd generation high-k/metal gate transistors optimized for ultra low power, high performance, and high density product applications
C.-H. Jan,M. Agostinelli,M. Buehler,Zhanping Chen,S.-J. Choi,G. Curello,H. Deshpande,S. Gannavaram,Hafez Walid M,U. Jalan,M. Kang,Pramod Kolar,K. Komeyli,B. Landau,A. Lake,N. Lazo,Seung Hwan Lee,T. Leo,J. Lin,Nick Lindert,S. Ma,L. McGill,C. Meining,A. Paliwal,Joodong Park,K. Phoa,Ian R. Post,N. Pradhan,M. Prince,Abdur Rahman,J. Rizk,L. Rockford,G. Sacks,A. Schmitz,H. Tashiro,Curtis Tsai,P. Vandervoorn,J. Xu,L. Yang,J.-Y. Yeh,J. Yip,Kevin Zhang,Yuegang Zhang,P. Bai +43 more
TL;DR: The low gate leakage of the high-k gate dielectric enables the triple transistor architecture to support ultra low power, high performance, and high voltage tolerant I/O devices concurrently.
Proceedings ArticleDOI
MRAM as Embedded Non-Volatile Memory Solution for 22FFL FinFET Technology
Oleg Golonzka,Juan G. Alzate,Umut Arslan,M. Bohr,P. Bai,Justin S. Brockman,Buford Benjamin,Chris Connor,Nilanjan Das,Brian S. Doyle,Tahir Ghani,Fatih Hamzaoglu,Philip E. Heil,P. Hentges,Rownak Jahan,David L. Kencke,Blake C. Lin,M. Lu,M. Mainuddin,Mesut Meterelliyoz,P. Nguyen,Dmitri E. Nikonov,O'brien Kevin P,J.O Donnell,Kaan Oguz,Ouellette Daniel G,Joodong Park,Pellegren James,Conor P. Puls,Pedro A. Quintero,Tofizur Rahman,A. Romang,M. Sekhar,A. Selarka,M. Seth,Smith Andrew,Smith Angeline K,Liqiong Wei,Christopher J. Wiegand,Z. Zhang,Kevin J. Fischer +40 more
TL;DR: Embedded NVM technology presented here achieves 200°C 10-year retention capability combined with>106 cycle endurance and high die yield, and is demonstrated on 7.2Mbit arrays.
Proceedings ArticleDOI
RF CMOS technology scaling in High-k/metal gate era for RF SoC (system-on-chip) applications
Chia-Hong Jan,M. Agostinelli,H. Deshpande,Mohammed A El-Tanani,Hafez Walid M,U. Jalan,L. Janbay,M. Kang,Hasnain Lakdawala,J. Lin,Y-L Lu,S. Mudanai,Joodong Park,Abdur Rahman,Jad B. Rizk,W.-K. Shin,Krishnamurthy Soumyanath,H. Tashiro,Curtis Tsai,P. Vandervoorn,J.-Y. Yeh,P. Bai +21 more
TL;DR: In this article, the authors examined the impact of silicon technology scaling trends and associated technological innovations on RF CMOS device characteristics, and the application of novel strained silicon and high-k/metal gate technologies not only benefits digital systems, but significantly improves RF performance.
Proceedings ArticleDOI
A 65nm ultra low power logic platform technology using uni-axial strained silicon transistors
Chia-Hong Jan,P. Bai,J. Choi,G. Curello,S. Jacobs,J. Jeong,K. Johnson,D. Jones,S. Klopcic,J. Lin,Nick Lindert,A. Lio,Sanjay Natarajan,J. Neirynck,P. Packan,Joodong Park,Ian R. Post,M. Patel,S. Ramey,P. Reese,L. Rockford,A. Roskowski,G. Sacks,B. Turkot,Yih Wang,Liqiong Wei,J. Yip,Ian A. Young,Kevin Zhang,Yuegang Zhang,M. Bohr,B. Holt +31 more
TL;DR: In this article, a leading edge 65nm logic process technology employing uni-axial strained silicon transistors has been optimized for ultra low power products, achieving record PMOS/NMOS drive currents of 038/066 mA/mum, respectively, at 12V and off-state leakage of 100 pA /mum.