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A comprehensive model of PMOS NBTI degradation

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TLDR
A comprehensive model for NBTI phenomena within the framework of the standard reaction–diffusion model is constructed and it is demonstrated how to solve the reaction-diffusion equations in a way that emphasizes the physical aspects of the degradation process and allows easy generalization of the existing work.
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This article is published in Microelectronics Reliability.The article was published on 2005-01-01 and is currently open access. It has received 710 citations till now. The article focuses on the topics: Negative-bias temperature instability.

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Proceedings ArticleDOI

Circuit-level NBTI macro-models for collaborative reliability monitoring

TL;DR: This work proposes a novel collaborative monitoring frame-work to track circuit level performance degradation caused specifically by NBTI, using heterogeneous on-chip sensors to measure environmental and stress parameters and a macro-model to map the device-level degradation information into circuit-level reliability estimates.
Proceedings ArticleDOI

On the Effect of NBTI Induced Aging of Power Stage on the Transient Performance of On-Chip Voltage Regulators

TL;DR: The measurement results from 130nm CMOS test-chips demonstrate that an IVR exhibits a higher tolerance to power stage aging compared to DLDO, indicating degradation of transient performance of on-chip voltage regulators.
Dissertation

Caractérisation et modélisation de la fiabilité relative au piégeage dans des transistors décananométriques et des mémoires SRAM en technologie FDSOI

TL;DR: In this article, the degradation BTI (pour Bias Temperature Instability), due principalement aux mecanismes de piegeage dansl’oxyde de grille, apparait comme etant the principale source de degradation responsable du vieillissement destransistors.
Proceedings ArticleDOI

New perspective on lifetime prediction approach for BTI and HCI stressed device and its impact on circuit lifetime

TL;DR: In this article, the authors investigated the effect of poly depletion effect (PDE) and accumulated trap charge effect (ATCE) on the circuit lifetime of poly silicon gated MOSFETs.
DissertationDOI

On the "switching defects" in the SiON and high-k gate dielectrics subjected to bias-temperature stressing

Ann Ann. Boo
TL;DR: In this paper, it is shown that the jt-Vd recovery is cyclic in nature and its amount of recovery per cycle is shown to remain constant, independent of the number of stress/recovery cycles.
References
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Journal ArticleDOI

Anomalous transit-time dispersion in amorphous solids

TL;DR: In this paper, the authors developed a stochastic transport model for the transient photocurrent, which describes the dynamics of a carrier packet executing a time-dependent random walk in the presence of a field-dependent spatial bias and an absorbing barrier at the sample surface.
Book

The physics of amorphous solids

TL;DR: The formation of amorphous solids Amorphous Morphology: The Geometry and Topology of Disorder Chalcogenide Glasses and Organic Polymers The Percolation Model Localization Delocalization Transitions Optical and Electrical Properties Index as discussed by the authors.
Journal ArticleDOI

Negative bias temperature instability: Road to cross in deep submicron silicon semiconductor manufacturing

TL;DR: The negative bias temperature instability (NBTI) commonly observed in p-channel metaloxide-semiconductor field effect transistors when stressed with negative gate voltages at elevated temperatures is discussed in this article.
Journal ArticleDOI

Negative bias stress of MOS devices at high electric fields and degradation of MNOS devices

TL;DR: A detailed study of the increase of the number of surface traps in MOS structures after NBS at temperatures (25-125°C) and fields (400-700 MV/m) comparable to those used in MNOS devices is presented in this article.
Journal ArticleDOI

Characteristics of the Surface‐State Charge (Qss) of Thermally Oxidized Silicon

TL;DR: In this paper, the surface state charge associated with thermally oxidized silicon has been studied experimentally using MOS structures and the results indicate that the surface-state charge can be reproducibly controlled over a range 1010-1012 cm -2, and it is an intrinsic property of the silicon dioxide-silicon system.
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Frequently Asked Questions (2)
Q1. What contributions have the authors mentioned in the paper "A comprehensive model of pmos nbti degradation" ?

In this paper, the authors construct a comprehensive model for NBTI phenomena within the framework of the standard reaction–diffusion model. The authors demonstrate how to solve the reaction–diffusion equations in a way that emphasizes the physical aspects of the degradation process and allows easy generalization of the existing work. The authors also augment this basic reaction–diffusion model by including the temperature and field-dependence of the NBTI phenomena so that reliability projections can be made under arbitrary circuit operating conditions. 

One of the key goal of their future work would be to clarify the role of such processing changes on NBTI performance.