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A comprehensive model of PMOS NBTI degradation

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TLDR
A comprehensive model for NBTI phenomena within the framework of the standard reaction–diffusion model is constructed and it is demonstrated how to solve the reaction-diffusion equations in a way that emphasizes the physical aspects of the degradation process and allows easy generalization of the existing work.
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This article is published in Microelectronics Reliability.The article was published on 2005-01-01 and is currently open access. It has received 710 citations till now. The article focuses on the topics: Negative-bias temperature instability.

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Journal ArticleDOI

Refined NBTI characterization of arbitrarily stressed PMOS devices at ultra-low and unique temperatures

TL;DR: The reexamine degradation and recovery dynamics in the negative bias temperature instability (NBTI) of p-channel metal oxide semiconductor field effect transistors (PMOSFETs) by making use of the recently developed in situ polyheater technique finds that increasing the stress bias predominantly activates a larger number of defects with similar recovery time constants causing steeper threshold voltage recovery transients after the termination of stress.
Journal ArticleDOI

Analyzing the distribution of threshold voltage degradation in nanoscale transistors by using reaction-diffusion and percolation theory

TL;DR: In this paper, the authors developed a theory for the statistical distribution of threshold voltage degradation (ΔV T ) due to the Negative Bias Temperature Instability (NBTI), and showed that the generation and annealing of interface defects are strongly correlated and that the statistics of interface defect at a given stress time follows a skew-normal distribution.
Journal ArticleDOI

Estimating and Mitigating Aging Effects in Routing Network of FPGAs

TL;DR: This paper proposes a routing accompanied by a placement algorithm that prevents constant stress on transistors by evenly distributing the stress through the interconnection resources and enhances the synthesis flow by augmenting the proposed routing algorithm to converge the signal probabilities toward aging-friendly values.
Journal ArticleDOI

Characterization of NBTI-Induced Interface State and Hole Trapping in SiON Gate Dielectrics of p-MOSFETs

TL;DR: In this paper, the authors present the analysis of the interface-state generation and hole-trapping components of the Si-oxynitride (SiON)-based p-MOSFETs due to the negative bias temperature instability.
Proceedings ArticleDOI

Trace-based framework for concurrent development of process and FPGA architecture considering process variation and reliability

TL;DR: A trace-based framework to enable concurrent process and FPGA architecture co-development and calculates the chip level performance and power distribution and soft error rate (SER) with consideration of process variations and device aging.
References
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Journal ArticleDOI

Anomalous transit-time dispersion in amorphous solids

TL;DR: In this paper, the authors developed a stochastic transport model for the transient photocurrent, which describes the dynamics of a carrier packet executing a time-dependent random walk in the presence of a field-dependent spatial bias and an absorbing barrier at the sample surface.
Book

The physics of amorphous solids

TL;DR: The formation of amorphous solids Amorphous Morphology: The Geometry and Topology of Disorder Chalcogenide Glasses and Organic Polymers The Percolation Model Localization Delocalization Transitions Optical and Electrical Properties Index as discussed by the authors.
Journal ArticleDOI

Negative bias temperature instability: Road to cross in deep submicron silicon semiconductor manufacturing

TL;DR: The negative bias temperature instability (NBTI) commonly observed in p-channel metaloxide-semiconductor field effect transistors when stressed with negative gate voltages at elevated temperatures is discussed in this article.
Journal ArticleDOI

Negative bias stress of MOS devices at high electric fields and degradation of MNOS devices

TL;DR: A detailed study of the increase of the number of surface traps in MOS structures after NBS at temperatures (25-125°C) and fields (400-700 MV/m) comparable to those used in MNOS devices is presented in this article.
Journal ArticleDOI

Characteristics of the Surface‐State Charge (Qss) of Thermally Oxidized Silicon

TL;DR: In this paper, the surface state charge associated with thermally oxidized silicon has been studied experimentally using MOS structures and the results indicate that the surface-state charge can be reproducibly controlled over a range 1010-1012 cm -2, and it is an intrinsic property of the silicon dioxide-silicon system.
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Frequently Asked Questions (2)
Q1. What contributions have the authors mentioned in the paper "A comprehensive model of pmos nbti degradation" ?

In this paper, the authors construct a comprehensive model for NBTI phenomena within the framework of the standard reaction–diffusion model. The authors demonstrate how to solve the reaction–diffusion equations in a way that emphasizes the physical aspects of the degradation process and allows easy generalization of the existing work. The authors also augment this basic reaction–diffusion model by including the temperature and field-dependence of the NBTI phenomena so that reliability projections can be made under arbitrary circuit operating conditions. 

One of the key goal of their future work would be to clarify the role of such processing changes on NBTI performance.