Proceedings ArticleDOI
A Microscopic Understanding of Nanometer Scale DENMOS Failure Mechanism under ESD Conditions
Amitabh Chatterjee,Sameer Pendharkar,Yen-Yi Lin,C. Duwury,Kaustav Banerjee +4 more
- pp 181-184
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TLDR
In this paper, an analysis of irreversible snapback caused due to the regenerative n-p-n turn-on in a DENMOS through a critical understanding of "thermal runaway" under ESD conditions is presented.Abstract:
We present for the first time, analysis of irreversible snapback caused due to the regenerative n-p-n turn-on in a DENMOS through a critical understanding of 'thermal runaway' under ESD conditions. The estimated It2 value from transient simulations has been correlated with the quasi-steady TLP data. A new regenerative bipolar turn-on induced failure model has been proposed and corroborated with experimental observations and failure analysis. We have also investigated the current crowding mechanism to understand the improvement in It2 value under gate and substrate biasing.read more
Citations
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Journal ArticleDOI
Part I: High-Voltage MOS Device Design for Improved Static and RF Performance
Ankur Gupta,Mayank Shrivastava,Maryam Shojaei Baghini,Dinesh K. Sharma,Harald Gossner,V. Ramgopal Rao +5 more
TL;DR: In this paper, the key design parameters of a shallow trench isolation-based drain-extended MOS transistor are discussed for RF power applications in advanced CMOS technologies, and the tradeoff between various dc and RF figures of merit (FoMs) is carefully studied using well-calibrated TCAD simulations.
Journal ArticleDOI
Off-State Degradation of High-Voltage-Tolerant nLDMOS-SCR ESD Devices
Alessio Griffoni,Shih-Hung Chen,Steven Thijs,B. Kaczer,Jacopo Franco,Dimitri Linten,A. De Keersgieter,Guido Groeseneken +7 more
TL;DR: In this paper, the off-state degradation of n-channel laterally diffused metal-oxide-semiconductor (MOS) silicon-controlled-rectifier electrostatic discharge (ESD) devices for high-voltage applications in standard lowvoltage complementary MOS technology is studied.
Proceedings ArticleDOI
Engineering optimal high current characteristics of high voltage DENMOS
Akram A. Salman,Farzan Farbiz,Aravind C. Appaswamy,Hans Kunz,Gianluca Boselli,Mariano Dissegna +5 more
TL;DR: In this article, the improvement in ESD performance of HV DENMOS and LDMOS obtained by using selective drain extension silicide blocking (SBLK) was demonstrated through 3D TCAD and TLP measurements.
Proceedings ArticleDOI
Novel area-efficient techniques for improving ESD performance of Drain extended transistors
TL;DR: In this article, the authors demonstrate that isolated DEMOS devices are also vulnerable to failures induced by the parasitic NPN to isolation due to insufficient body resistance and demonstrate the effectiveness of using selectively SBLKed drain fingers to enable self protection.
Proceedings ArticleDOI
Physical Insights into the ESD behavior of Drain Extended FinFETs
TL;DR: In this article, the physical insights of Drain Extended FinFET under ESD stress condition are explored, and key features like bipolar triggering, conductivity modulation and localized hot spot formation pertaining to DeFinFET failure mechanism are discussed comprehensively.
References
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Journal ArticleDOI
Avalanche injection and second breakdown in transistors
P.L. Hower,V.G. Krishna Reddi +1 more
TL;DR: In this paper, it was shown that transistors having thin, lightly doped collector regions are particularly susceptible to avalanche injection, which suggests that some compromise may be necessary in the design of high-frequency power transistors.
Journal ArticleDOI
Analysis of nonuniform ESD current distribution in deep submicron NMOS transistors
TL;DR: In this paper, a detailed study of the nonuniform bipolar conduction phenomenon under electrostatic discharge (ESD) events in single-finger NMOS transistors is presented, and its implications for the design of ESD protection for deep-submicron CMOS technologies are analyzed.
Journal ArticleDOI
Moving current filaments in integrated DMOS transistors under short-duration current stress
Marie Denison,M. Blaho,P. Rodin,V. Dubec,Dionyz Pogany,D. Silber,Erich Gornik,Matthias Stecher +7 more
TL;DR: In this article, the authors studied the influence of termination layout of the source field on the hot-spot dynamics and discussed conditions for filament motion under non-destructive snap-back conditions, which help homogenize the time averaged current density distribution and enhance the device robustness against electrostatic discharges.
Journal ArticleDOI
A new numerical and experimental analysis tool for ESD devices by means of the transient interferometric technique
Susanna Reggiani,Elena Gnani,Massimo Rudan,Giorgio Baccarani,Sergey Bychikhin,Jan Kuzmik,Dionyz Pogany,Erich Gornik,Marie Denison,N. Jensen,G. Groos,Matthias Stecher +11 more
TL;DR: In this article, two different protection diodes are investigated with electrothermal simulation and transient interferometric thermal mapping experiments in a new complementary approach, and the prediction capability of the simulation tool is validated up to the thermal failure of the p-n junction.
A New Numerical and Experimental Analysis Tool for ESD Devices by Means of the Transient
Susanna Reggiani,Elena Gnani,Massimo Rudan,Giorgio Baccarani,Sergey Bychikhin,Jan Kuzmik,Dionyz Pogany,Erich Gornik,Marie Denison,N. Jensen,G. Groos,Matthias Stecher +11 more
TL;DR: In this article, two different protection diodes are investigated with electrothermal simulation and transient interferometric thermal-mapping experiments in a new complementary approach, and the prediction capability of the simulation tool is validated up to the thermal failure of the p-n junction.