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Journal ArticleDOI

An improved frequency compensation technique for CMOS operational amplifiers

B.K. Ahuja
- 01 Dec 1983 - 
- Vol. 18, Iss: 6, pp 629-633
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TLDR
In this paper, a two-stage CMOS operational amplifier is proposed to provide stable operation for a much larger range of capacitive loads, as well as much improved V/SUB BB/ power supply rejection over very wide bandwidths for the same basic operational amplifier circuit.
Abstract
The commonly used two-stage CMOS operational amplifier suffers from two basic performance limitations due to the RC compensation network around the second gain stage. First, it provides stable operation for only a limited range of capacitive loads, and second, the power supply rejection shows severe degradation above the open-loop pole frequency. The technique described provides stable operation for a much larger range of capacitive loads, as well as much improved V/SUB BB/ power supply rejection over very wide bandwidths for the same basic operational amplifier circuit. The author presents a mathematical analysis of this new technique in terms of its frequency and noise characteristics followed by its implementation in all n-well CMOS process. Experimental results show 70-dB negative power supply rejection at 100 kHz and an input noise density of 58 nV/(Hz)/SUP 1/2/ at 1 kHz.

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Citations
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Proceedings ArticleDOI

A CMOS Low Distortion Fully Differential Power Amplifier With Double Nested Miller Compensation

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100mV precision 40V tolerant scalable cap free current limited voltage source for wide input current range

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Patent

System and method for a multistage operational amplifier

TL;DR: In this paper, an operational amplifier includes a first amplifier stage coupled between an input node and an intermediate node, a second amplifier stage coupling between the intermediate node and the output node, and a compensation capacitor having a first terminal coupled to the intermediate nodes and a second terminal, and the compensation amplifier having a positive gain greater than one.
Journal ArticleDOI

Trade-offs among power consumption and other design parameters of two-stage recycling folded cascode OTA that using embedded cascode current buffer compensation technology

TL;DR: The two-stage recycling folded cascode OTA (RFCOTA) is introduced for lower consumption without degrading other performances and the embedded cascode current buffer (ECCB) compensation is employed which further increases the phase margin compared to Miller compensation without additional power consumption and chip areas.
References
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Journal ArticleDOI

MOS operational amplifier design-a tutorial overview

TL;DR: In this paper, an overview of current design techniques for operational amplifiers implemented in CMOS and NMOS technology at a tutorial level is presented, focusing on CMOS amplifiers because of their more widespread use.
Journal ArticleDOI

A high performance low power CMOS channel filter

TL;DR: In this article, a new CMOS PCM channel filter is described, which includes transmit and receive filters on a single die, and the chip displays an idle-channel noise of typically 0 dBrnC0, a power supply rejection ratio of 40-50 dB at 1 kHz, and a fully operational power dissipation of only 35 mW.
Journal ArticleDOI

High-performance NMOS operational amplifier

TL;DR: A high performance operational amplifier 300 mil/SUP 2/ in area has been designed and fabricated in a standard n-channel silicon-gate enhancement/depletion MOS process.
Journal ArticleDOI

A single-chip CMOS PCM codec with filters

TL;DR: In this paper, a complete PCM codec using charge redistribution and switched-capacitor techniques is described, implemented in a two-level polysilicon CMOS technology using 23.4 mm/SUP 2/ of active area.
Journal ArticleDOI

Low-Power High-Drive CMOS Operational Amplifiers

TL;DR: Low-power CMOS op amps with high-drive capability and good settling characteristics are described, suitable for applications in such systems as charge-redistribution codecs and switched-capacitor filters.