Journal ArticleDOI
An improved frequency compensation technique for CMOS operational amplifiers
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TLDR
In this paper, a two-stage CMOS operational amplifier is proposed to provide stable operation for a much larger range of capacitive loads, as well as much improved V/SUB BB/ power supply rejection over very wide bandwidths for the same basic operational amplifier circuit.Abstract:
The commonly used two-stage CMOS operational amplifier suffers from two basic performance limitations due to the RC compensation network around the second gain stage. First, it provides stable operation for only a limited range of capacitive loads, and second, the power supply rejection shows severe degradation above the open-loop pole frequency. The technique described provides stable operation for a much larger range of capacitive loads, as well as much improved V/SUB BB/ power supply rejection over very wide bandwidths for the same basic operational amplifier circuit. The author presents a mathematical analysis of this new technique in terms of its frequency and noise characteristics followed by its implementation in all n-well CMOS process. Experimental results show 70-dB negative power supply rejection at 100 kHz and an input noise density of 58 nV/(Hz)/SUP 1/2/ at 1 kHz.read more
Citations
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Journal ArticleDOI
Correction to “A Channel-Select Filter With Agile Blocker Detection and Adaptive Power Dissipation”
TL;DR: A dynamic biasing scheme that reduces the average DC power of channel-select filters in wireless receivers and a blocker detection technique makes it possible to automatically adjust the power dissipation depending on the absence of presence of blockers, with low overhead in power consumption and circuit complexity.
Journal ArticleDOI
Gain-enhanced feedforward path compensation technique for pole-zero cancellation at heavy capacitive loads
P. K. Chan,Y. C. Chen +1 more
TL;DR: An improved frequency compensation technique is presented, based on a cascade of a voltage amplifier and a transconductor to form a composite gain-enhanced feedforward stage in a two-stage amplifier so as to broaden the gain bandwidth via low-frequency pole-zero cancellation at heavy capacitive loads, but yet without increasing substantial power consumption.
Journal ArticleDOI
High speed, high linearity CMOS buffer amplifier
TL;DR: In this paper, a low-noise class AB buffer amplifier which has a rail-to-rail output swing while driving large resistive and capacitive loads is presented along with the test results.
Journal ArticleDOI
A 16- $\Omega$ Audio Amplifier With 93.8-mW Peak Load Power and 1.43-mW Quiescent Power Consumption
C. Mohan,Paul M. Furth +1 more
TL;DR: A low-distortion three-stage class-AB audio amplifier is designed to drive a 16-Ω headphone speaker load using fully differential internal stages with local common-mode feedback and replica biasing of the output stage to achieve high linearity.
Journal ArticleDOI
Low-voltage low-power fast-settling CMOS operational transconductance amplifiers for switched-capacitor applications
Mohammad Yavari,Omid Shoaei +1 more
TL;DR: In this paper, a two-stage fully differential operational transconductance amplifier (OTA) was proposed for lowvoltage and fast-settling switched-capacitor circuits in pure digital CMOS technology.
References
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Journal ArticleDOI
MOS operational amplifier design-a tutorial overview
Paul R. Gray,Robert G. Meyer +1 more
TL;DR: In this paper, an overview of current design techniques for operational amplifiers implemented in CMOS and NMOS technology at a tutorial level is presented, focusing on CMOS amplifiers because of their more widespread use.
Journal ArticleDOI
A high performance low power CMOS channel filter
TL;DR: In this article, a new CMOS PCM channel filter is described, which includes transmit and receive filters on a single die, and the chip displays an idle-channel noise of typically 0 dBrnC0, a power supply rejection ratio of 40-50 dB at 1 kHz, and a fully operational power dissipation of only 35 mW.
Journal ArticleDOI
High-performance NMOS operational amplifier
TL;DR: A high performance operational amplifier 300 mil/SUP 2/ in area has been designed and fabricated in a standard n-channel silicon-gate enhancement/depletion MOS process.
Journal ArticleDOI
A single-chip CMOS PCM codec with filters
TL;DR: In this paper, a complete PCM codec using charge redistribution and switched-capacitor techniques is described, implemented in a two-level polysilicon CMOS technology using 23.4 mm/SUP 2/ of active area.
Journal ArticleDOI
Low-Power High-Drive CMOS Operational Amplifiers
TL;DR: Low-power CMOS op amps with high-drive capability and good settling characteristics are described, suitable for applications in such systems as charge-redistribution codecs and switched-capacitor filters.