Journal ArticleDOI
An improved frequency compensation technique for CMOS operational amplifiers
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TLDR
In this paper, a two-stage CMOS operational amplifier is proposed to provide stable operation for a much larger range of capacitive loads, as well as much improved V/SUB BB/ power supply rejection over very wide bandwidths for the same basic operational amplifier circuit.Abstract:
The commonly used two-stage CMOS operational amplifier suffers from two basic performance limitations due to the RC compensation network around the second gain stage. First, it provides stable operation for only a limited range of capacitive loads, and second, the power supply rejection shows severe degradation above the open-loop pole frequency. The technique described provides stable operation for a much larger range of capacitive loads, as well as much improved V/SUB BB/ power supply rejection over very wide bandwidths for the same basic operational amplifier circuit. The author presents a mathematical analysis of this new technique in terms of its frequency and noise characteristics followed by its implementation in all n-well CMOS process. Experimental results show 70-dB negative power supply rejection at 100 kHz and an input noise density of 58 nV/(Hz)/SUP 1/2/ at 1 kHz.read more
Citations
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Journal ArticleDOI
A Transient-Enhanced Low-Quiescent Current Low-Dropout Regulator With Buffer Impedance Attenuation
TL;DR: In this paper, a low-dropout regulator (LDO) with an impedance-attenuated buffer for driving the pass device was proposed. But the buffer was not used to reduce the output voltage.
Book
CMOS Data Converters for Communications
TL;DR: The book outlines the design of the basic building blocks such as operational amplifiers, comparators, and reference generators with emphasis on the practical aspects and explains in detail how to derive data converter requirements for a given communication system.
Journal ArticleDOI
Analysis of multistage amplifier-frequency compensation
Ka Nang Leung,Philip K. T. Mok +1 more
TL;DR: Frequency-compensation techniques of single-, two- and three-stage amplifiers based on Miller pole splitting and pole-zero cancellation are re-analyzed and several proposed methods to improve the published topologies are given.
Journal ArticleDOI
A power optimized 13-b 5 Msamples/s pipelined analog-to-digital converter in 1.2 /spl mu/m CMOS
D.W. Cline,Paul R. Gray +1 more
TL;DR: In this paper, a 13-b 5-MHz pipelined analog-to-digital converter (ADC) was designed with the goal of minimizing power dissipation by using a high swing residue amplifier and by optimizing the per stage resolution.
Journal ArticleDOI
Active-feedback frequency-compensation technique for low-power multistage amplifiers
Hoi Lee,Philip K. T. Mok +1 more
TL;DR: In this paper, an active-feedback frequency-compensation (AFFC) technique for low-power operational amplifiers is presented, where a high-speed block separates the low-frequency high-gain path and high-frequency signal path such that high gain and wide bandwidth can be achieved simultaneously in the AFFC amplifier.
References
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Journal ArticleDOI
MOS operational amplifier design-a tutorial overview
Paul R. Gray,Robert G. Meyer +1 more
TL;DR: In this paper, an overview of current design techniques for operational amplifiers implemented in CMOS and NMOS technology at a tutorial level is presented, focusing on CMOS amplifiers because of their more widespread use.
Journal ArticleDOI
A high performance low power CMOS channel filter
TL;DR: In this article, a new CMOS PCM channel filter is described, which includes transmit and receive filters on a single die, and the chip displays an idle-channel noise of typically 0 dBrnC0, a power supply rejection ratio of 40-50 dB at 1 kHz, and a fully operational power dissipation of only 35 mW.
Journal ArticleDOI
High-performance NMOS operational amplifier
TL;DR: A high performance operational amplifier 300 mil/SUP 2/ in area has been designed and fabricated in a standard n-channel silicon-gate enhancement/depletion MOS process.
Journal ArticleDOI
A single-chip CMOS PCM codec with filters
TL;DR: In this paper, a complete PCM codec using charge redistribution and switched-capacitor techniques is described, implemented in a two-level polysilicon CMOS technology using 23.4 mm/SUP 2/ of active area.
Journal ArticleDOI
Low-Power High-Drive CMOS Operational Amplifiers
TL;DR: Low-power CMOS op amps with high-drive capability and good settling characteristics are described, suitable for applications in such systems as charge-redistribution codecs and switched-capacitor filters.